Io devices and i/o subsystem and direct memory access, Computer Engineering

Assignment Help:

Why IO devices cannot be connected directly to the system bus?

Ans: The IO devices can't be directly connected to the system bus because the following reason

A) The data transfer rate of IO devices is slower that of CPU.

B) The IO devices in computer system has different data formats and work lengths that of CPU. So it is essential to use a module between system bus and IO device which is called IO module or IO system

Write the factors considered in designing an I/O subsystem?

 Ans:

1. Data transfer: Amount, rate to or from device.

 2. Data Location: Device selection, address of data within device (track, sector etc)

3. Memory or between an I/O device and CPU.

4. Synchronization: Output only when device is ready, input only when

Described Direct Memory Access

Ans: A modest increase in hardware enables an IO device to transfer a block of information to /from memory without CPU intervention. This task needs the IO device to produce memory addresses and transfer data via the bus by using interface controllers.

 


Related Discussions:- Io devices and i/o subsystem and direct memory access

Enumerate about the specialised hardware, Enumerate about the Specialised h...

Enumerate about the Specialised hardware Specialised hardware such as protected memory or cryptographic memory module for storing and protecting the keys proves to be a good s

Input-output-processor interconnection network (iopin), Input-Output-Proces...

Input-Output-Processor Interconnection Network (IOPIN) This interconnection network is used for communication between I/O channels and processors. All processors commune with a

Dma controllers - computer architecture, DMA controllers in computer system...

DMA controllers in computer system:   DMA Controller   Part of the I/O device interface   DMA Channels   Performs functions that in general would be performed by t

Assignment, zero, one, two three address instructions

zero, one, two three address instructions

Shared-memory programming model, Q. Shared-memory programming model? In...

Q. Shared-memory programming model? In shared-memory programming model tasks share a common address space that they read and write asynchronously. Several mechanisms like semap

Explain about mmx architecture, Explain about MMX architecture MMX arc...

Explain about MMX architecture MMX architecture introduces new packed data types. Data types are eight packed, consecutive 8-bit bytes; four packed, consecutive 16-bit words;

Conversion of fractional number into its binary number, Conversion of fract...

Conversion of fractional number 0.6875 into its equivalent binary number ? Ans. Multiply the fractional number 0.6875 with 2 until the remainder becomes 0 that is, Ther

C++ program on pebble merchant, how to solve pebble merchant problem.? codi...

how to solve pebble merchant problem.? coding for it..!

Name the popular security measures, Name the popular security measures ...

Name the popular security measures A number of security products covering a broad range of methods are available in the market. Most popular of all the security measures are th

What is bank interleaving, Interleaved memory is a method for compensating ...

Interleaved memory is a method for compensating the relatively slow speed of DRAM. The CPU can access alternative sections instantly without waiting for memory to be cached. Multip

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd