Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Interrupt - Driven Input-output?
Problem with programmed I/O is that processor has to wait a long time for I/O interface to see whether a device is free or waits until completion of I/O. Result is that the performance of processor goes down extremely. What is the solution? What about processor going back to do other useful work without waiting for I/O device to finish or get freed up? However how will processor be intimated about completion of I/O or a device is ready for I/O? A well-organized mechanism was considered for this which is referred to as interrupt-driven I/O. In this mechanism provision of interruption of processor work once device has completed I/O or when it's ready for I/O has been provided.
Interrupt-driven I/O mechanism for transferring a block of data is displayed in Figure 5(b). Please note after issuing a read command (for input) CPU goes off to do some other useful work whereas I/O interface proceeds to read data from connected device. On completion of an instruction cycle CPU checks for interrupts (that will happen when data is in data register of I/O interface and it now requires CPU's attention). Now CPU saves important register and processor status of executing program in a stack and requests I/O device to provide its data that is placed on data bus by I/O device. After taking needed action with data CPU can go back to program it was executing before interrupt.
How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes? Ans. All higher order l
What is data hazard in pipelining? What are the solutions? A data hazard is a situation in which the pipeline is stalled due to the data to be operated on are delayed for some
With the help of a truth table explain the working of a half subtractor. Draw the logic diagram using gates. Ans: Half Subtractor: For the subtraction of B (subtrahend) f
RAM: Read / Write memory, High Speed, Volatile Memory. ROM: Read only memory, Low Speed, Non Voliate Memory. RAM- Random Access memory it is a Volatile Memory. volatil
Bring out the importance of hierarchy of operators? The operators within C are grouped hierarchically according to their precedence(i.e., order of evaluation). Operations w
DEFINE FILE ORGANISATION
What are the various Design constraints used while performing Synthesis for a design? 1. Make the clocks (frequency, duty-cycle). 2. Explain the transition-time requirements
comparision of sorting techniques in performance
Design a BCD to seven segment decoder that accepts a decimal digit in BCS and generates the appropriate output for segments in display indicator. Ans: BCD-TO-seven-Segment
What will occur when contents of register are shifter left, right? This is well known that into left shift all bits will be shifted left and LSB will be appended along with 0 a
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd