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Q. Interrupt - Driven Input-output?
Problem with programmed I/O is that processor has to wait a long time for I/O interface to see whether a device is free or waits until completion of I/O. Result is that the performance of processor goes down extremely. What is the solution? What about processor going back to do other useful work without waiting for I/O device to finish or get freed up? However how will processor be intimated about completion of I/O or a device is ready for I/O? A well-organized mechanism was considered for this which is referred to as interrupt-driven I/O. In this mechanism provision of interruption of processor work once device has completed I/O or when it's ready for I/O has been provided.
Interrupt-driven I/O mechanism for transferring a block of data is displayed in Figure 5(b). Please note after issuing a read command (for input) CPU goes off to do some other useful work whereas I/O interface proceeds to read data from connected device. On completion of an instruction cycle CPU checks for interrupts (that will happen when data is in data register of I/O interface and it now requires CPU's attention). Now CPU saves important register and processor status of executing program in a stack and requests I/O device to provide its data that is placed on data bus by I/O device. After taking needed action with data CPU can go back to program it was executing before interrupt.
tCAS is the number of clock cycles required to access a particular column of data in SDRAM. CAS latency is the column address strobe time, sometimes referred to as tCL.
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