Interrupt - driven input-output, Computer Engineering

Assignment Help:

Q. Interrupt - Driven Input-output?

Problem with programmed I/O is that processor has to wait a long time for I/O interface to see whether a device is free or waits until completion of I/O. Result is that the performance of processor goes down extremely. What is the solution? What about processor going back to do other useful work without waiting for I/O device to finish or get freed up? However how will processor be intimated about completion of I/O or a device is ready for I/O? A well-organized mechanism was considered for this which is referred to as interrupt-driven I/O. In this mechanism provision of interruption of processor work once device has completed I/O or when it's ready for I/O has been provided.

Interrupt-driven I/O mechanism for transferring a block of data is displayed in Figure 5(b). Please note after issuing a read command (for input) CPU goes off to do some other useful work whereas I/O interface proceeds to read data from connected device. On completion of an instruction cycle CPU checks for interrupts (that will happen when data is in data register of I/O interface and it now requires CPU's attention). Now CPU saves important register and processor status of executing program in a stack and requests I/O device to provide its data that is placed on data bus by I/O device. After taking needed action with data CPU can go back to program it was executing before interrupt.


Related Discussions:- Interrupt - driven input-output

Importance of artificial intelligence, Businesses are interested in AI bec...

Businesses are interested in AI because of the characteristics it offers that no other systems type offers. That is AI ability to: a. Preserve Intelligence and Knowledge: C

What do you mean by segment numbers, Q. What do you mean by Segment numbers...

Q. What do you mean by Segment numbers? There is a good reason for not leaving determination of segment numbers up to assembler. It permits programs written in 8086 assembly

How many bits must be decoded for 128 × 8 ram chips, How many bits must be ...

How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes? Ans. All higher order l

The statement vline is used to insert vertical lines, Like ULINE the statem...

Like ULINE the statement VLINE is used to insert vertical lines. No , Vline is not used to insert vertical lines.

Methods to resolve collision during hashing., What are the two methods to r...

What are the two methods to resolve collision during hashing. The two methods to resolve collision during hashing are: a) Open addressing and b) Chaining.

Explain in detail about touch screens, Explain in detail about Touch screen...

Explain in detail about Touch screens For people who can't use a keyboard allowing input; also helps people with learning difficulties since icons are easier to understand

Explain the concept of concurrent and parallel execution, The Concept of Co...

The Concept of Concurrent and Parallel Execution Real world systems are concurrent in nature and computer science is about modeling the real world. Illustrations of real world

Define terms setup time and hold time violation, Define setup time and hold...

Define setup time and hold time, what will occur when there is setup time and hold tine violation, how to overcome it? For Synchronous flip-flops, we have particular requiremen

Direct addressing and immediate addressing mode , Direct Addressing and  I...

Direct Addressing and  Immediate Addressing mode - computer architecture:  Immediate Addressing: It is the simplest form of addressing. Here, the operand is itself given

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd