Interconnection network, Computer Engineering

Assignment Help:

Interconnection Network

Introduction

This unit discusses the types and properties of interconnection networks.  In multiprocessor systems, there are multiple I/O modules, multiple processing elements and multiple memory modules.  Each processor can access any of the I/O units and any of the memory modules. The connectivity among these is performed by interconnection networks.

Therefore, an interconnection network is used for swap data between two processors in a multistage network.  Memory bottleneck is a basic limitation of Von Newman architecture. In this case of multiprocessor systems, the performance will be brutally affected in case the data exchange between processors is late. The multiprocessor system has single global shared memory and every processor has a small local memory.  The processors can access data from memory associated with another processor or from shared memory using an interconnection network.  Thus, interconnection networks play a essential role in determining the general performance of the multiprocessor systems.  The interconnection networks are similar to customary network systems consisting of edges and nodes. The nodes are switches having some input and some output (say n input and m output) lines. Depending on the switch connection, the data is promoted from input lines to output lines. The interconnection network is placed among various devices in the multiprocessor network.

The architecture of a general multiprocessor is detremined in Figure 1.  In the multiprocessor systems, these are multiple processor modules (each processor module consists of a processing element, small sized local memory and cache memory ), shared peripheral devices and shared global memory.

                     506_Interconnection Network.png

PIOIN= Processor to I/O Interconnection Network

PMIN = Processor to Memory Interconnection Network

PM = Processor Module

PPIN = Processor to Processor Interconnection Network

Module communicates with diffrent modules peripheral devices and shared memory using interconnection networks.


Related Discussions:- Interconnection network

What are dynamic process groups, Q. What are Dynamic Process Groups? To...

Q. What are Dynamic Process Groups? To create and manage dynamic groups a separate library libgpvm3.a should be linked with the user programs which make use of any of group fun

Illustrate about system memory-management mode, Memory - management mode ...

Memory - management mode System memory-management mode (SMM) is on the same level as protected mode, real mode and virtual mode though it is provided to function as a manager

Arrays, how to calculate students''s averange test scores

how to calculate students''s averange test scores

Obstacles to is implementation - information system, Obstacles to IS implem...

Obstacles to IS implementation While information systems are now becoming the norm in most organisations the journey to this point has been a difficult one. Even in the 21st c

Indirect addressing mode - assembly language, Indirect addressing mode - as...

Indirect addressing mode - assembly language: The Indirect addressing mode and the address field of the instruction refers to the address of a word in memory, which in turn co

C program, Write a program to find the area under the curve y = f(x) betwee...

Write a program to find the area under the curve y = f(x) between x = a and x = b, integrate y = f(x) between the limits of a and b. The area under a curve between two points can b

Describe the difference between cache and virtual memory, Question 1: (...

Question 1: (a) What do you meant by an expert system? (b) Describe benefits of the EDI. (c) Describe what you understand by: (i) File Infectors (ii) Boot Sect

Design a 32:1 multiplexer, Design a 32:1 multiplexer using two 16:1 multipl...

Design a 32:1 multiplexer using two 16:1 multiplexers and a 2:1 multiplexer Ans. Design a 32 X 1 MUX by using two 16 X 1 MUX and one 2 X 1. Now here total 32 input lines

Define resolution versus accuracy in mouse, Q. Define Resolution versus Acc...

Q. Define Resolution versus Accuracy in mouse? Resolution of mouse is known in CPI (Counts per Inch) it implies that number of signals per inch of travel.  This implies the mou

Minimize the logic function using NAND gate, Minimize the logic function F(...

Minimize the logic function F(A, B, C, D) = ∑ m(1,3,5,8,9,11,15) + d(2,13) using NAND gate with help of K-map. Ans. Realization of given expression by using NAND gates:  In

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd