Interconnection network, Computer Engineering

Assignment Help:

Interconnection Network

Introduction

This unit discusses the types and properties of interconnection networks.  In multiprocessor systems, there are multiple I/O modules, multiple processing elements and multiple memory modules.  Each processor can access any of the I/O units and any of the memory modules. The connectivity among these is performed by interconnection networks.

Therefore, an interconnection network is used for swap data between two processors in a multistage network.  Memory bottleneck is a basic limitation of Von Newman architecture. In this case of multiprocessor systems, the performance will be brutally affected in case the data exchange between processors is late. The multiprocessor system has single global shared memory and every processor has a small local memory.  The processors can access data from memory associated with another processor or from shared memory using an interconnection network.  Thus, interconnection networks play a essential role in determining the general performance of the multiprocessor systems.  The interconnection networks are similar to customary network systems consisting of edges and nodes. The nodes are switches having some input and some output (say n input and m output) lines. Depending on the switch connection, the data is promoted from input lines to output lines. The interconnection network is placed among various devices in the multiprocessor network.

The architecture of a general multiprocessor is detremined in Figure 1.  In the multiprocessor systems, these are multiple processor modules (each processor module consists of a processing element, small sized local memory and cache memory ), shared peripheral devices and shared global memory.

                     506_Interconnection Network.png

PIOIN= Processor to I/O Interconnection Network

PMIN = Processor to Memory Interconnection Network

PM = Processor Module

PPIN = Processor to Processor Interconnection Network

Module communicates with diffrent modules peripheral devices and shared memory using interconnection networks.


Related Discussions:- Interconnection network

Boiler troubles, Differences between internal and external treatment in boi...

Differences between internal and external treatment in boiler

Explain about floating point representation, Q. Explain about Floating Poin...

Q. Explain about Floating Point Representation? Floating-point number representation includes two parts. The first part of number is a signed fixed-point number which is called

Explain the differences between paging and segmentation, Explain the differ...

Explain the differences between Paging and segmentation. Paging and segmentation P aging Segmentation Computer memory is separa

Signaling pvm process, Q. Signaling PVM process? int pvm_sendsig( ...

Q. Signaling PVM process? int pvm_sendsig( int tid, int signum ) Transmits a signal to other PVM process. tid is task identifier of PVM process to receive signal.

Logic programs, Logic Programs: A subset of first order logic is "Logi...

Logic Programs: A subset of first order logic is "Logic programs". However logic program having a set of Horn clauses that are implication conjectures when there is a conjunct

Define the message queues, The message queue provides the information about...

The message queue provides the information about sizes of queues under utilization of various processors. It points to size of every processor incoming message queue that would be

How to maintain lists, How to maintain lists? To return from a high li...

How to maintain lists? To return from a high list level to the next-lower level (SY-LSIND), the user chooses back on a secondary list.  The system then gives the currently dis

What are dynamic process groups, Q. What are Dynamic Process Groups? To...

Q. What are Dynamic Process Groups? To create and manage dynamic groups a separate library libgpvm3.a should be linked with the user programs which make use of any of group fun

Keypads operation, The 16 keys (4x4 matrixes) keypads diagram is shown in f...

The 16 keys (4x4 matrixes) keypads diagram is shown in figure 4 above. Let see how the keypad is connected. Each square of the alphanumeric has to be pushed to make a switch or con

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd