Interconnection network, Computer Engineering

Assignment Help:

Interconnection Network

Introduction

This unit discusses the types and properties of interconnection networks.  In multiprocessor systems, there are multiple I/O modules, multiple processing elements and multiple memory modules.  Each processor can access any of the I/O units and any of the memory modules. The connectivity among these is performed by interconnection networks.

Therefore, an interconnection network is used for swap data between two processors in a multistage network.  Memory bottleneck is a basic limitation of Von Newman architecture. In this case of multiprocessor systems, the performance will be brutally affected in case the data exchange between processors is late. The multiprocessor system has single global shared memory and every processor has a small local memory.  The processors can access data from memory associated with another processor or from shared memory using an interconnection network.  Thus, interconnection networks play a essential role in determining the general performance of the multiprocessor systems.  The interconnection networks are similar to customary network systems consisting of edges and nodes. The nodes are switches having some input and some output (say n input and m output) lines. Depending on the switch connection, the data is promoted from input lines to output lines. The interconnection network is placed among various devices in the multiprocessor network.

The architecture of a general multiprocessor is detremined in Figure 1.  In the multiprocessor systems, these are multiple processor modules (each processor module consists of a processing element, small sized local memory and cache memory ), shared peripheral devices and shared global memory.

                     506_Interconnection Network.png

PIOIN= Processor to I/O Interconnection Network

PMIN = Processor to Memory Interconnection Network

PM = Processor Module

PPIN = Processor to Processor Interconnection Network

Module communicates with diffrent modules peripheral devices and shared memory using interconnection networks.


Related Discussions:- Interconnection network

Search-based tools, The search-based tools initially identify the problem a...

The search-based tools initially identify the problem and after that appropriately give advice on how to correct it. AT Expert from Cray Research is one of the tools being used

Shared-memory programming model, Q. Shared-memory programming model? In...

Q. Shared-memory programming model? In shared-memory programming model tasks share a common address space that they read and write asynchronously. Several mechanisms like semap

Determine the term- files, Determine the term- Files File maintenance i...

Determine the term- Files File maintenance is significant. Updating of files generally involves inserting, amending and deleting data. Example: A bank would amend data

Adder substractor, how can we bimpliment half substractor using nand gate

how can we bimpliment half substractor using nand gate

Which address is specially used by transport layer, The addressing speciall...

The addressing specially used by Transport Layer is? The addressing particularly used through transport layer is application port address.

Give brief summary of common aspects found in spreadsheets, Give brief summ...

Give brief summary of common aspects found in spreadsheets -  It's made up of columns and rows; every row is identified by a number and every column is identified with a letter

Explain concurrent sharing, Explain Concurrent Sharing Here a number of...

Explain Concurrent Sharing Here a number of programs that may share a file simultaneously. While this is the case, it is necessary to prevent mutual interference among them. Th

What is ternary association, What is ternary association Associations c...

What is ternary association Associations can be binary, ternary, or have higher order. In use, the vast majority of it is binary or ternary associations. Except a ternary assoc

Why echo suppressor is detrimental to full duplex operation, Echo suppresso...

Echo suppressor is detrimental to full duplex operation because? This disables one of the two pairs in a four-wire trunk line while a signal is detected upon another pair.

excitation diagram indicating , a.  Sketch the excitation diagram indicati...

a.  Sketch the excitation diagram indicating the last states and next states. b. Build the circuit using a Synchronous Counter with JK FF and NAND gates only. Replicate the circ

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd