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Q. Instruction per cycle in RISC?
One instruction per cycle: A machine cycle is total time taken to fetch two operands from registers perform ALU operation on them and store result in a register. So RISC instruction execution takes about same time as micro-instructions on CISC machines. With these simple instruction execution instead of micro-instructions, it can use fast logic circuits for control unit, so increasing execution efficiency further.
How can system improved if one arrive at the probability of availability of free lines during the busy hour? Improvement can be made when the system is act as a loss system in
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