Instruction formats-microprocessor, Assembly Language

Assignment Help:

Instruction Formats

A machine language instruction format has 1 or more number of fields linked with it. The first field is known as operation code field or op code field, which show the type of the operation to be performed by the CPU. The instruction format also has other fields known as operand fields. The CPU executes the instruction by using the information which reside in these fields.

There are 6 general formats of instructions in 8086 instruction set. The length of an instruction can vary from one byte to six bytes. The instruction formats are given as following:

1) One byte Instruction:  This format is just one byte long and can have theregister operands or  implied data . The least significant 3-bits of the op code are referring for specifying the register operand, if any. Or else all the 8-bits form an opcode and the operands are implied.

2) Register  to Register: This format is 2 bytes long. The first byte of the code indicatethe operation code and width of the operand indicated by w bit. The second byte of the code indicate the register operands and R/M field, as given below.

2261_instruction1.jpg

The register represented  by the REG field is 1 of the operands.  The R/M field indicate  another register or memory location, for example. the other operand.

3) Register to/from Memory with no Displacement:  This format is 2 bytes long and same as the register to register format except for the MOD field as shown.

460_instruction2.jpg

The MOD field indicates the mode of addressing. The R/M, MOD,REG and the W fields are decided inTable 3.2.

4) Register  to/from  Memory  with Displacement:  This type of instruction  format have  one or two extra bytes for displacement along with 2-byte the format of the register to/from memory without displacement. The format is given.

2109_instruction3.jpg

5) Immediate Operand to Register: In this format, the first byte and the 3-bits from the second byte which are utilized for REG field in case of register to register format are utilized for opcode. It also has one or two bytes of immediate data. The complete instruction format is as given below.

360_instruction4.jpg

6) Immediate Operand to Memory with 16-bit Displacement:  This type of instruction format requires 5 or 6 bytes for coding. The first 2 bytes have the information regardingMOD, OPCODE and R/M fields. The remaining 4 bytes have 2 bytes of displacement and 2 bytes of data as shown.

 

2472_instruction5.jpg


Related Discussions:- Instruction formats-microprocessor

Cache memory-microprocessor, Cache Memory Caching is a technology based...

Cache Memory Caching is a technology based on the memory subsystem of any computer. The majoraim of a cache is to accelerate the computer while keeping the cost of the computer

Test-logical instruction-microprocessor, TEST : Logical Compare Instructio...

TEST : Logical Compare Instruction: The TEST instruction performs bit by bit logical AND operation on the 2 operands. Each bit of the result is then set to value I, if the equival

Write program that will generate array of ten random number, 1. Write a pro...

1. Write a program that will generate an array of ten random 32-bit integers, and that will  display on the monitor the numbers followed by either the words " has the fourth bit se

Code using hla language, You have been hired by the Elbonian government to ...

You have been hired by the Elbonian government to write an Assembly program to help its workforce determine how much their tax will be. The tax laws in Elbonian are very simple. Th

Help with assemly language assignment, Will be needing help with assembly l...

Will be needing help with assembly language assignments over the course of 4 weeks

Operating System, Why is the capability to relocate processes desirable?

Why is the capability to relocate processes desirable?

PIC lights on, errorlevel -302 ;prevents error code for this...

errorlevel -302 ;prevents error code for this chipset __config 0x373A ;chip config PIC spec page 146 processor 16F877A ;chipset reset code

Into-jmp-unconditional branch instruction-microprocessor, INTO : Interrupt...

INTO : Interrupt on Overflow:- It is executed, when the overflow flag OF is set. The new contents of IP and CS register are taken from the address 0000:0000 as described in INT

.., Sum of series of 10 numbers and store result in memory location total

Sum of series of 10 numbers and store result in memory location total

English, how we can take permission

how we can take permission

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd