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After going through details of device interfaces next point to be discussed is how the interface can be used to support I/O from devices. Binary information received from an external device is generally stored in memory for later processing. Information transferred from central computer in an external device initiates in memory unit. Data transfer between central computer and I/O devices can be handled in some modes. 3 techniques are possible for I/O operation. These are:
Figure below gives an general idea of these 3 techniques:
Figure: Overview of the three Input/ Output
In programmed I/O, I/O operations are fully controlled by processor. The processor executes a program which initiates, directs and terminate an I/O operation. It needs a little special I/O hardware however is quite time consuming for processor as processor has to wait for slower I/O operations to finish.
With interrupt driven I/O when interface decides that device is ready for data transfer it produces an interrupt request to the computer. Upon detecting external interrupt signal processor stops the task it was processing and branches to a service program to process I/O transfer and then returns to task it was initially performing that result in waiting time by the processor being reduced.
With both interrupt-driven and programmed I/O processor is responsible for extracting data from main memory for output and storing data in main memory during input. What about having a substitute where I/O device may directly store data or retrieve data from memory? This alternative is called direct memory access (DMA). In this mode I/O interface and main memory exchange data directly without involvement of processor.
Figure: Three techniques of I/O
PRAM is one among the models which are used for designing the parallel algorithm as shown in Figure. The PRAM model comprises the following components: i) A group of identical
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