Indias parallel computers, Computer Engineering

Assignment Help:

Parallel Computers

In India, the design and development of parallel computers in progress in the early 80?s. The Indian Government recognized the Centre for Development of Advanced Computing (CDAC) in 1988 with the endeavor of building high-speed parallel machines. CDAC built and designed a 256 processors computer with INMOS T8000 series processors in 1991.  The other collection which developed parallel machines were at Centre for enlargement of Bhabha Atomic Research Centre, Telematics, Defence Research, Indian Institute for Sciences and Development Organization. The systems organized by these organizations are supposed to be the state of the art of parallel computers. It is generally decided that all the computers built by 2020 will be inherently parallel.

Next, we enumerate most important features of various generations of parallel systems developed in India.

Salient Features of PARAM series:

PARAM 8000 CDAC 1991:  INMOS 8000 transputer,256 Processor parallel computer as processing element. Peak concert of 1 Gigaflop. Application software weak.

PARAM 8600 CDAC 1994: PARAM 8000 better with Intel i860 vector microprocessor.  One vector processor for 4 INMOS 8000. Vectorized Fortran. Enhanced software for numerical applications.

 

PARAM 9000/SS CDAC 1996 : Used Sunsparc II processors and an interconnection switch made of INMOS transputers.

Important Features of MARK Series:

Flosolver Mark I NAL 1986: Used 4 Intel 8086 processors with 8087 co-processors. Proof of concept design.

Flosolver Mark II NAL 1988: 16 Intel 80386 processor and 80387 floating-point processor connected to Multibus II backplane bus for interprocessor communication. Used for solving fluid dynamics problems using Fortran.

Flosolver Mark III NAL 1991:  8 Intel i860 vector processors associated using message passing co-processor on a back plane bus. i860 were rated at 80 Mflops peak.  Fluid dynamics Codes(FDC) were optimized for the architecture.

Important Features of ANUPAM Series:

ANUPAM Model 1 BARC 1993: 8 Intel i860 processors connected to a Multibus II.Eight such clusters connected by using 16-bit SCSI interface. Used Front-end processor to assign responsibilities to the parallel computing cluster.  One parallel program at a time could be run.  Fortran environment.

ANUPAM Model 2 BARC 1997:  DEC Alpha processors associated by ATM switch in a cluster. DEC Unix environment.  High concert Fortran compiler to run data parallel programs.


Related Discussions:- Indias parallel computers

Drawbacks of specifying parameter assignments using defparam, The disadvant...

The disadvantages of specifying parameter assignments using defparam are: -  Parameter  is  essentially specified  by  the  scope  of  hierarchies  underneath  which  it exists

Algorithms, Data array A has data series from 1,000,000 to 1 with step size...

Data array A has data series from 1,000,000 to 1 with step size 1, which is in perfect decreasing order. Data array B has data series from 1 to 1,000,000, which is in random order.

Device drivers in windows system, Q. Device drivers in Windows system? ...

Q. Device drivers in Windows system? In Windows system device drivers are implemented as dynamic link libraries (DLLs). This scheme has advantages which DLLs comprises sharea

Which of the logic gates are known as universal gates, Which of the logic g...

Which of the logic gates are known as universal gates ? Ans. NAND and NOR are termed as universal gates, since any digital circuit can be realized completely by using either of

Delete the leaves of a binary tree, Write a recursive algorithm to delete t...

Write a recursive algorithm to delete the leaves of a binary tree. Programming Requirements You must use the binary search tree code provided.  Each algorithm must be impleme

Units of artificial neural networks, Units of artificial neural networks: ...

Units of artificial neural networks: However the input units simply output the value that was input to them from the example to be propagated. So every other unit in a network

Illustrate logical data processing instructions, Q. Illustrate logical Data...

Q. Illustrate logical Data Processing Instructions? AND, OR, NOT, XOR operate on binary data stored in registers. For illustration if two registers comprises data:   R1 = 10

Bus arbitration - computer architecture, Bus arbitration: In single bu...

Bus arbitration: In single bus architecture when more than 1 device requests the bus, a controller known as bus arbiter decides who gets the bus; this is known as the bus arbi

101-key enhanced keyboard, With its newer range of PCs IBM introduced 101-k...

With its newer range of PCs IBM introduced 101-key Enhanced/Advanced keyboard.  This keyboard is fundamental keyboard behind modern QWERTY keyboards. This has function keys aligned

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd