Indias parallel computers, Computer Engineering

Assignment Help:

Parallel Computers

In India, the design and development of parallel computers in progress in the early 80?s. The Indian Government recognized the Centre for Development of Advanced Computing (CDAC) in 1988 with the endeavor of building high-speed parallel machines. CDAC built and designed a 256 processors computer with INMOS T8000 series processors in 1991.  The other collection which developed parallel machines were at Centre for enlargement of Bhabha Atomic Research Centre, Telematics, Defence Research, Indian Institute for Sciences and Development Organization. The systems organized by these organizations are supposed to be the state of the art of parallel computers. It is generally decided that all the computers built by 2020 will be inherently parallel.

Next, we enumerate most important features of various generations of parallel systems developed in India.

Salient Features of PARAM series:

PARAM 8000 CDAC 1991:  INMOS 8000 transputer,256 Processor parallel computer as processing element. Peak concert of 1 Gigaflop. Application software weak.

PARAM 8600 CDAC 1994: PARAM 8000 better with Intel i860 vector microprocessor.  One vector processor for 4 INMOS 8000. Vectorized Fortran. Enhanced software for numerical applications.

 

PARAM 9000/SS CDAC 1996 : Used Sunsparc II processors and an interconnection switch made of INMOS transputers.

Important Features of MARK Series:

Flosolver Mark I NAL 1986: Used 4 Intel 8086 processors with 8087 co-processors. Proof of concept design.

Flosolver Mark II NAL 1988: 16 Intel 80386 processor and 80387 floating-point processor connected to Multibus II backplane bus for interprocessor communication. Used for solving fluid dynamics problems using Fortran.

Flosolver Mark III NAL 1991:  8 Intel i860 vector processors associated using message passing co-processor on a back plane bus. i860 were rated at 80 Mflops peak.  Fluid dynamics Codes(FDC) were optimized for the architecture.

Important Features of ANUPAM Series:

ANUPAM Model 1 BARC 1993: 8 Intel i860 processors connected to a Multibus II.Eight such clusters connected by using 16-bit SCSI interface. Used Front-end processor to assign responsibilities to the parallel computing cluster.  One parallel program at a time could be run.  Fortran environment.

ANUPAM Model 2 BARC 1997:  DEC Alpha processors associated by ATM switch in a cluster. DEC Unix environment.  High concert Fortran compiler to run data parallel programs.


Related Discussions:- Indias parallel computers

Multi-threaded processors, The use of distributed shared memory in parallel...

The use of distributed shared memory in parallel computer architecture however the use of distributed shared memory has the problem of accessing the remote memory that results in l

Cn, What is the basic requirement for establishing VLANs?

What is the basic requirement for establishing VLANs?

Direct isp service through leased line, The most expensive method of access...

The most expensive method of accessing Internet is to use leased lines which connect directly to the ISP. This will increase access rate to anywhere between 64 K and 1.5 Mbps, rely

What can digital circuits do?, Circuits can be designed to implement a spec...

Circuits can be designed to implement a specifictaske.g. a simple circuit could compare two inputvoltages and give a high output if they matched anda low output if they did not mat

Multiprogramming or multitasking, Multiprogramming or multitasking? An...

Multiprogramming or multitasking? Ans: The OS manages the concurrent execution of many application programs to make best possible use of computer resources. This pattern of si

What are the engineering applications in parallel computing, Engineering Ap...

Engineering Applications A number of the engineering applications are: 1. Simulations of artificial ecosystems  2. Airflow circulation over aircraft components Airflow

Implementation of BUS, Q. Implementation of BUS Construction of a bus s...

Q. Implementation of BUS Construction of a bus system for four registers employing 4×1 multiplexers is displayed below. Every register has four bits which are numbered 0 throug

Encryption techniques to ensute secured transaction on net, Two popular enc...

Two popular encryption techniques to ensute secured transactions on the net? 1. Translation table 2. Word/byte rotation and XOR bit masking.

What are the event key words in interactive reporting, What are the event k...

What are the event key words in interactive reporting? Event Keyword                                                 Event AT LINE-SELECTION         Moment at which the u

Define mercantile process model from perspect of merchant, Define Mercantil...

Define Mercantile Process Model from the Merchant’s perspective along with a suitable diagram. This model consists of three activities into the purchase consummation phase: Aut

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd