Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
How could we implement locks? No matter how we choose to implement them, we must have some hardware support. One possibility for implementing locks on a uniprocessor machine is is to disable interrupts when testing/setting locks. With interrupts disabled on a single processor machine, the processor cannot switch processes, and so we can guarantee that only the active process will have access to the shared data. Another option would be to make use of atomic operations, such as test and set. This type of operation (which usually corresponds to a single atomic assembly instruction) behaves as if it used the following C function, atomically:
int test_and_set(int x) // let x be strictly either 0 or 1.{if (x) { return 1; } else { x=1; return 0; }}
All this needs to be implemented atomically, in hardware. Using this type of atomic operation, one could implement thread lock(l) simply as while test_and_set(l) {
; // do nothing} // spinlock version of thread_lock()and thread unlock(l) simply asl = 0; // we need this to be an atomic clear (or assign) instruction
The assembly instruction test and set can bemade to be atomic acrossmultiple processors. An equivalent option would be an atomic compare and swap assembly instruction. These low-level hardware solutions are then built up into high-level functions, either built into the languages, or in libraries. In general, do not implement your own locking functions, but rather use functions from a tested library. Getting things right can be tricky, and your own solution is also likely to be non-portable.
Question : (a) In the demand paging system, when a process tries to access a page that was not brought into memory, a page fault occurs that involves a series of actions. The
Q. Why is it important to scale up system bus and device speeds as the CPU speed increases? Answer: Consider a system which carries out 50% I/O and 50% computes. Doubling-up
Q. Consider the following page-replacement algorithms. Rank the algorithms on a five-point scale from "bad" to "perfect" according to their page-fault rate. Detach those algorithm
Assume there are only 4 page frames in the physical memory, for the following reference string: 1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2, 8. a) What i
What is the MFD? UFD? How are they related? MFD is master-file directory, which points to the UFDs. UFD is user-file directory, which points to each of user's files.
What is the kernel? A more common explanation is that the OS is the one program running at all times on the computer usually known as the kernel, with all else being applicati
Write a short note about context switch. Switching the CPU to another process needs saving the state of the old process and loading the saved state for the new process. This ta
DIFFERENT MULTITHREADING MODELS Multithreading Models the majority multithreading models fall into one of the following categories of threading implementation: 1. M
Q. What is the basic function of Assembler ? Input to an assembler is an assembly language program. Output is an object program and information which enables the loader to prep
Discuss the high barriers to entry in the market for PL operating systems
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd