Implementation of locks, Operating System

Assignment Help:

How could we implement locks? No matter how we choose to implement them, we must have some hardware support. One possibility for implementing locks on a uniprocessor machine is is to disable interrupts when testing/setting locks. With interrupts disabled on a single processor machine, the processor cannot switch processes, and so we can guarantee that only the active process will have access to the shared data. Another option would be to make use of atomic operations, such as test and set. This type of operation (which usually corresponds to a single atomic assembly instruction) behaves as if it used the following C function, atomically:

int test_and_set(int x) // let x be strictly either 0 or 1.
{
if (x) { return 1; } else { x=1; return 0; }
}

All this needs to be implemented atomically, in hardware. Using this type of atomic operation, one could implement thread lock(l) simply as while test_and_set(l) {

; // do nothing
} // spinlock version of thread_lock()
and thread unlock(l) simply as
l = 0; // we need this to be an atomic clear (or assign) instruction

The assembly instruction test and set can bemade to be atomic acrossmultiple processors. An equivalent option would be an atomic compare and swap assembly instruction. These low-level hardware solutions are then built up into high-level functions, either built into the languages, or in libraries. In general, do not implement your own locking functions, but rather use functions from a tested library. Getting things right can be tricky, and your own solution is also likely to be non-portable.


Related Discussions:- Implementation of locks

Explain the statements present in assembly language, Explain the Statements...

Explain the Statements Present in Assembly Language An assembly program consists of subsequent three types of statements: a. Imperative statements: this point out an action

Page-table lookups, How exactly is a page table used to look up an address?...

How exactly is a page table used to look up an address? The CPU has a page table base register (PTBR)which points to the base (entry 0) of the level-0 page table. Each process h

Mutual exclusion variable, Since each thread has its own processing space t...

Since each thread has its own processing space therefore communication between threads will need to be done through a common global variable. Since multiple threads can access the

Create a gantt chart for scheduling algorithms, Question: (a) The follo...

Question: (a) The following table (table 1.0) gives the length of the CPU burst time in milliseconds of processes P 1 to P 4 . Assume the processes arrived in the order P 1 ,

Cycle time, when demand is 24000 units/year, production rate is 48000 units...

when demand is 24000 units/year, production rate is 48000 units/year, setup cost is rs 200 per setup, carring cost is rs 20 per units/year, and economic batch quantity is 692.8203

Explain the thread contextual data, Explain the Thread Contextual Data  ...

Explain the Thread Contextual Data  Threads in Net Ware carry additional context as well. Per-thread, stacks, errno, Net Ware Errno, t_errno and others are available to the ap

Explain how indefinite blocking or starvation occur, explain how indefinit...

explain how indefinite blocking or starvation occurs..

How are file sharing and protection implemented, How are file sharing and p...

How are file sharing and protection implemented? To execute file sharing and protection the system have to maintain more file and directory attributes than are needed on a sing

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd