Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Implementation of BUS
Construction of a bus system for four registers employing 4×1 multiplexers is displayed below. Every register has four bits which are numbered 0 through 3. Every multiplexer has 4 data inputs, numbered 0 through 3 and two control or selection lines which are C0 and C1. The data inputs of 0th MUX are associated to the respective 0th input of each register to form four lines of the bus. The 0th multiplexer multiplexes the four 0th bits of the registers and in the same way for the three other multiplexers.
Because the same selection lines C0 and C1 are connected to all multiplexers so they choose the four bits of one register and transfer them in four-line common bus.
Figure: Implementation of BUS
When C1C0 = 00 the 0th data input of all multiplexers are selected and this causes bus lines to receive content of register A because the outputs of register A are associated to the 0th data inputs of the multiplexers which is then applied to output which forms the bus. In the same way when C1C0 = 01, register B is selected and so on. The subsequent table displays the register which is selected for every of the four possible values of selection lines:
Figure: Bus Line Selection
To create a bus for 8 registers of 16 bits each you would need 16 multiplexers one for every line in the bus. Number of multiplexers required to construct the bus is equal to number of bits in every register. Every multiplexer should have eight data input lines as well as three selection lines (23 = 8) to multiplex one bit in eight registers.
Q. Analysis of Amdahls law? The conclusions of analysis of Amdahl's law are: 1) To optimize performance of parallel computers modified compilers should be developed that sho
The process of entering data into a ROM is called ? Ans. The process of entering data in ROM is termed as programming the ROM.
Structural hazards - computer architecture: A structural hazard takes place when a part of the processor's hardware is required by 2 or more than two instructions at the same
Data Transfer Two most fundamental data transfer instructions in 8086 microprocessor are XCHG and MOV. Let's give illustrations of the use of these instructions. Program 1:
Q. Define Interrupts in assembly language? An interrupt causes interruption of an ongoing program. A number of the common interrupts are: printer, monitor, keyboard, an error c
Explain the working of a 2-bit digital comparator with the help of Truth Table. Ans. Digital comparator is a combinational circuit which compares two numbers, A and B; and
Solve the following 8-department problem using the MIP method. What is the resulting layout and flow-distance score? Note that the aspect ratio of each department should be 2.
Refining the Ratio Analysis Basically, refinement leads to purity. Thus to get a cleaner, more understandable and consistent design need to iterate analysis process. R
Q. Define General Purpose Register Architecture? General Purpose Register (GPR) Architecture: A register is a word of internal memory similar to the accumulator. GPR architec
Tightly Coupled System- Shared Memory System Shared memory multiprocessorshas has following description: Every processor commune through a shared global memory. For
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd