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Q. Illustarte Basic Flip-flops?
Let's first see a ordinary latch. A latch or flip-flop can be created employing two NOR or NAND gates. Figure (a) presents logic diagram for S-R latch using NOR gates. Latch has two inputs S and R for set and reset respectively. When output is Q=1 and Q¯ =0, latch is said to be in set state. Whereas if Q=0 and Q¯ =1 it's in reset state. Usually outputs Q and Q¯ are complement of one another. When both inputs are equivalent to 1 at same time an undefined state results as both outputs are equivalent to 0.
Perceptron training: Here the weights are initially assigned randomly and training examples are needed one after another to tweak the weights in the network. Means all the exa
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n=(x*2)/(1=0) the value x=0 and is used to stop the algerithin.The calculation is repeated using values of x=0 is input. There is only a need to check for error positions. The va
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diagrams of picket fence problem
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How many two input AND gates and two input OR gates are required to realize Y = BD+CE+AB ? Ans. Here three product terms, therefore three AND gates of two inputs are needed.
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