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Q. How does computer know that overflow has happened?
Illustration: Add numbers 65 and 75 in 8 bit register in signed 2's complement notation.
Here expected result is +140 however binary sum is a negative number and is equal to -116 that obviously is a wrong result. This has happened on account of overflow.
How does computer know that overflow has happened?
If the carry in the sign bit isn't equal to carry out of sign bit then overflow should have happened.
Another general test of overflow is: if the sign of both operands is same at the time of addition then overflow should have occurred if sign of resultant is different than that of sign of any operand.
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