Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. How can this arithmetic processor be associated to the CPU?
Two mechanisms are used for connecting arithmetic processor to CPU.
If an arithmetic processor is treated as one of the Input / Output or peripheral units then it's termed as a peripheral processor. CPU transmitsinstructions and data to peripheral processor that performs the needed operations on data and communicates the results back to CPU. A peripheral processor has various registers to communicate with the CPU. These registers can be addressed by CPU as I/O register addresses. Peripheral and CPU processors are generally quite independent and communicate with each other by exchange of information using data transfer instructions. Data transfer instructions should be specific instructions in CPU. This kind of connection is known as loosely coupled.
Instead if the arithmetic processor has a register and instruction set that can be considered an extension of CPU registers and instruction set then it is known as a tightly coupled processor. Here CPU reserves a special subset of code for arithmetic processor. In such a system the instructions meant for arithmetic processor are fetched by CPU and decoded mutually by CPU and arithmetic processor and finally executed by arithmetic processor. So these processors can be considered a logical extension of CPU. These kind of attached arithmetic processors are called as co-processors.
The concept of co-processor existed in 8086 machine until Intel 486 machines where co-processor was separate. But Pentium at present doesn't have a separate co-processor. In the same way peripheral processors aren't found as arithmetic processors in general. Though many chips are used for specialized I/O architecture.
Determine the primary memory of the server The keys used for accessing the server are held at a secret location in the primary memory of the server. This area or location is hi
Can matchcode object contain Ids with different update types? Yes.
Q. Explain about disk caching scheme? The disk caching scheme can be used to speed up performance of disk drive system. A set (cache) of buffers is assigned to hold some disk b
Load address for the first word of the program is called? Ans. load address origin is known as load address for the first word of the program.
SQA defect removal policies
Host Computer: An array processor may be attached to a host computer by the control unit. The reason of the host computer is to broadcast a sequence of vector instructions by CU t
Q Use as few gates as possible, design a NAND-to-AND gate network that realize the following Boolean algebra expression. ABCD + A'BC'D + A'BC'D' + A'BCD + (A'B'C'D' + A'BCD')
what is software engineering?
The NAND gate. The NAND gate is equivalent to an AND gate followed by a NOT gate so that the output is 0 when all of the inputs are high, otherwise the output is 1. There may
Define memory management system? The part of the computer system that supervises the flow of information among auxiliary memory and main memory is known as memory management sy
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +1-415-670-9521
Phone: +1-415-670-9521
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd