History of parallel computers, Computer Engineering

Assignment Help:

History Of Parallel Computers

The test with and implementations of the utilize of parallelism started year back in the 1950s by the IBM.  The IBM enlarges computers also called as IBM 7030 was building in 1959.  In the design of these computers, a number of new ideas like overlapping I/O with processing and instruction look ahead were established.  A serious advance towards designing similar computers was going ahead with the development of ILLIAC IV in 1964 at the University of Illinois.  It had an only control unit but have multiple processing elements. On this machine, at a time, a one operation is executed on dissimilar data items by diverse processing elements. The idea of pipelining was begin in computer CDC 7600 in 1969.  It takes pipelined arithmetic unit.  In the years 1970 to 1985, the study in this area was decided on the development of vector super computer.  In 1976, the CRAY1 was determined by Seymour Cray.  Cray1 was a pioneering effort in the enlargement of vector registers. It accessed main memory only for store and load operations. Cray1 never use optimized pipelined arithmetic unit and virtual memory.  Cray1 had timer speed of 12.5 n.sec. The Cray1 processor evolved upto a speed of 12.5 Mflops on 100 × 100 linear equation solutions. The next invention of Cray called Cray XMP was introduced in the years 1982-84.  It was attached with 8-vector supercomputers and it is used a shared memory also.

Apart from Cray, the giant company developing, Control Data Corporation (CDC), parallel computers of USA, formed supercomputers, the CDC 7600. Its vector supercomputers named Cyber 205 had memory to memory architecture that is, input Vector operands were flow from the main memory to the vector arithmetic unit and the outputs were accumulated back in the main memory.  The benefit of this architecture was that It did not maximize the size of vector operands. The drawback was that it essential required a very high speed memory so that there would be no speed mismatch between main memory and vector arithmetic units.  Developing such high speed memory is very expensive. The Clock hustle of Cyber 205 was 20 n.sec. In the 1980s Japan also going ahead for manufacturing high performance vector supercomputers. Companies like, Fujitsu, Hitachi and NEC were the core manufacturers.  Hitach Established S-810/210 and S-810/10 vector supercomputers in 1982. All these equipment used semiconductor technologies to accomplish speeds at par with Cyber and Cray.  But their vectorisers and operating system were inferior than those of American companies.


Related Discussions:- History of parallel computers

What is the linkage section, The linkage section is part of a known as prog...

The linkage section is part of a known as program that 'links' or maps to data items in the calling program are working storage. It is the part of the called program where these sh

Visualization, Visualization Visualization is a general method in contr...

Visualization Visualization is a general method in contract to search based tools.  In this method visual aids are given like pictures to assist the programmer in evaluating th

How the at-user command serves mainly in lists, How the at-user command ser...

How the at-user command serves mainly in lists? The AT USER-COMMAND event serves mostly to handle own function codes.  In this case, you should make an individual interface wit

What is the difference among declaration and definition, The declaration te...

The declaration tells the compiler that at some later point we plan to show the definition of this declaration. E.g.: void stars () //function declaration The definition con

Iterative deepening search, Iterative Deepening Search: So, breadth fi...

Iterative Deepening Search: So, breadth first search is always guaranteed to find a solution (if one exists), actually it eats all the memory. For the depth first search, ther

What is ''preemption'' program, Program 'preemption' is? Ans. Forced de...

Program 'preemption' is? Ans. Forced de allocation of the CPU from a program that is executing on the CPU is called preemption program.

Operating sustem, describe the action by thread library to context switch ...

describe the action by thread library to context switch between user level threads

Explain the input stage of an ADC, Explain the Input Stage of an ADC. ...

Explain the Input Stage of an ADC. Ans. Input Stage- In ADC at the input stage, analog voltage can contain any value in a range although the digital output can contain

3 sets of input data, Prepare at least 3 sets of input data (Test data) alo...

Prepare at least 3 sets of input data (Test data) along with expected output for testing your program.

Pd controller, PD controller Student should aim for Kp and Kd value that...

PD controller Student should aim for Kp and Kd value that will minimize the steady error with improved rise time and settling time. The amount of over shoot should not be more t

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd