History of parallel computers, Computer Engineering

Assignment Help:

History Of Parallel Computers

The test with and implementations of the utilize of parallelism started year back in the 1950s by the IBM.  The IBM enlarges computers also called as IBM 7030 was building in 1959.  In the design of these computers, a number of new ideas like overlapping I/O with processing and instruction look ahead were established.  A serious advance towards designing similar computers was going ahead with the development of ILLIAC IV in 1964 at the University of Illinois.  It had an only control unit but have multiple processing elements. On this machine, at a time, a one operation is executed on dissimilar data items by diverse processing elements. The idea of pipelining was begin in computer CDC 7600 in 1969.  It takes pipelined arithmetic unit.  In the years 1970 to 1985, the study in this area was decided on the development of vector super computer.  In 1976, the CRAY1 was determined by Seymour Cray.  Cray1 was a pioneering effort in the enlargement of vector registers. It accessed main memory only for store and load operations. Cray1 never use optimized pipelined arithmetic unit and virtual memory.  Cray1 had timer speed of 12.5 n.sec. The Cray1 processor evolved upto a speed of 12.5 Mflops on 100 × 100 linear equation solutions. The next invention of Cray called Cray XMP was introduced in the years 1982-84.  It was attached with 8-vector supercomputers and it is used a shared memory also.

Apart from Cray, the giant company developing, Control Data Corporation (CDC), parallel computers of USA, formed supercomputers, the CDC 7600. Its vector supercomputers named Cyber 205 had memory to memory architecture that is, input Vector operands were flow from the main memory to the vector arithmetic unit and the outputs were accumulated back in the main memory.  The benefit of this architecture was that It did not maximize the size of vector operands. The drawback was that it essential required a very high speed memory so that there would be no speed mismatch between main memory and vector arithmetic units.  Developing such high speed memory is very expensive. The Clock hustle of Cyber 205 was 20 n.sec. In the 1980s Japan also going ahead for manufacturing high performance vector supercomputers. Companies like, Fujitsu, Hitachi and NEC were the core manufacturers.  Hitach Established S-810/210 and S-810/10 vector supercomputers in 1982. All these equipment used semiconductor technologies to accomplish speeds at par with Cyber and Cray.  But their vectorisers and operating system were inferior than those of American companies.


Related Discussions:- History of parallel computers

Determine about the web based tools, Determine about the Web Based Tools ...

Determine about the Web Based Tools HTML, XML, CGI and other open standards As is well known, the Web as well as Intranets speak and understand only one language i.e., th

By using what nested macro calls are expanded, Nested Macro calls are expan...

Nested Macro calls are expanded using the? Ans. By using the LIFO (Last in First out) Nested Macro calls are expanded.

Database, I got a graduate level database assignment which is due at Dec 8,...

I got a graduate level database assignment which is due at Dec 8, 11:59p.m. Can you finish it on time in high quality?

Performance analysis, In order to calculate the performance of the program,...

In order to calculate the performance of the program, the normal form of analysis of the program is to simply measure the total amount of CPU time needed to implement the various p

What is electronic cash, What is electronic cash? E-cash is cash which ...

What is electronic cash? E-cash is cash which is shown by two models. One is the on-line form of e-cash which permits for the completion of all types of internet transactions.

Define about exe programs, Q. Define about EXE Programs? An EXE program...

Q. Define about EXE Programs? An EXE program is stored on disk with extension .exe. EXE programs are longer than COM programs as every EXE program is related with an EXE header

Show organisation of clos network, Q. Show Organisation of Clos network? ...

Q. Show Organisation of Clos network? Clos network: This network was designed by Clos (1953).  It's a non-blocking network and offers full connectivity similar to crossbar netw

Technical Support Engineer, I''m seeking a challenging professional working...

I''m seeking a challenging professional working position in the field of Information Technology,where I’ll be given the chance to enhance & expand the skills & experience

Communication traffic and message queues, The Communication Traffic gives a...

The Communication Traffic gives a pictorial view of the communication traffic in the interconnection network with respect to the time in progress. The Communication Traffic shows t

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd