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Handling Multiple Devices
Interrupt Priority
Controlling device requests
KEN, DEN
Implementation of interrupt priory by using individual interrupt-request and acknowledge lines
Polled interrupts: Priority decided by the order in which processor polls the component (polls their status registers) vectored interrupts: Priority determined by the order in which processor tells component toput its code on the address lines (order of connection in the chain)
(a) Daisy chain
Daisy chaining of INTA: If device has not requested any service, passes the INTA signal to next device if necessitate service, does not pass the INTA, puts its code on the address lines Polled
Q. Concurrently read concurrently write? It is one of the models derived from PRAM. In this model the processors access the memory locations simultaneously for reading and writ
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