Give the basic structure of a basic dma module, Electrical Engineering

Assignment Help:

a) Give four features that were traditionally reserved to RISC architectures?

b) Determine the overall throughput for 21 sequential instructions assuming a four-stage pipeline and each instruction goes through fetch (7 nanoseconds), decode (2 nanoseconds), execute (1nanosecond) and write-back (10 nanoseconds) stages?

c) Calculate the CPI for a hypothetical 1.8 GHz processor with a benchmarked rating of 500 MIPS?

d) Assume a processor with instruction frequencies and costs as follows

• Integer ALU: 50%, 2 cycles
• Load: 25%, 5 cycles
• Store: 10%, 3 cycles
• Branch: 15%, 2 cycles

Determine which of the following three cases will improve or reduce overall performance and by how much:

CASE 1: Reduce Branch cost to 1 cycle and Store cost to 2 cycles
CASE 2: Reduce Load cost to 3 cycles while increasing ALU cost to 4 cycles
CASE 3: Reduce Load cost to 4 cycles

e) Mention one advantage of using DMA over Interrupt-Driven I/O. Give the basic structure of a basic DMA module.


Related Discussions:- Give the basic structure of a basic dma module

parity flag - registers, Parity flag  - Registers If after  any arit...

Parity flag  - Registers If after  any arithmetical or logical operation if  number of  the accumulator  are even  parity  flag (P)  is set otherwise  reset.

Ac, power factor improvement

power factor improvement

Pop psw instruction , POP PSW Instruction It is similar to  above pop...

POP PSW Instruction It is similar to  above pop  instruction but instead of normal  register  pairs it uses PSW  as its operand. Program status word  comprises of the content

New asic design flow, There is a requirement to propose a new ASIC design f...

There is a requirement to propose a new ASIC design flow within your company, from VHDL design capture through to GDSII tape out.  It is very important that the flow includes all t

What do you mean by addressing and numbering, Q. What do you mean by addres...

Q. What do you mean by addressing and numbering? Numbering and Addressing: In data and telephone networks, end equipment are more often single units than multiple devices uni

When input is a triangular wave, Q. When input is a triangular wave. W...

Q. When input is a triangular wave. When the input fed to differentiating circuit is a triangular wave, the output will be a rectangular wave. During the period OA of

Charge variation with time, Q. A charge variation with time is given in Fig...

Q. A charge variation with time is given in Figure. Draw the corresponding current variation with time.

Draw timing diagram of synchronous counter, Q. Consider the synchronous cou...

Q. Consider the synchronous counter shown in Figure of the text. (a) Draw its timing diagram. (b) Show the implementation of the same synchronous counter using D flip-flops.

Embedded system, 10. List the three ways in which an RTOS handles ISRs in a...

10. List the three ways in which an RTOS handles ISRs in a multitasking environment

Obtain plots by using probe, Q. A dc source is connected to a series RLC ci...

Q. A dc source is connected to a series RLC circuit by a switch that closes at t = 0, as shown in Figure, with initial conditions. For the values of R = 20, 40, and 80 , solve for

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd