General terms for cache-microprocessor, Assembly Language

Assignment Help:

General terms for Cache :

Cache Hits : When the cache consisted the information requested, the transaction is said to be a cache hit.

Cache Miss : When the cache does not have the information requested, the transaction is said to be a cache miss.

Cache consistency : Since cache is a photocopy of a small piece main memory, it is essential that the cache always reflects what is in main memory.

Snoop : When a cache is watching the address lines for transaction, this is known a snoop.  This function permit thecache to see if any transactions are accessing memory it contains within itself.

Snarf : When a cache takes the information from the data lines, the cache is command to have snarfed the data.   This function permits the cache to be updated and maintain consistency.

Snoop and snarf are the mechanisms the cache utilize to maintain consistency.

Dirty Data : When data is modified within cache but not in main memory, the data in cache is called "dirty data."

Stale Data : When data is modified in main memory but not in cache, the data in the cache is called stale data.

Cache Architecture : Caches have 2 characteristics, a write policy anda read architecture. "The write policy might be either"Write-Through."Or "Write-Back". The read architecture can be either "Look Aside" or "Look Through.


Related Discussions:- General terms for cache-microprocessor

8254 programmable timer-microprocessor, 8254 Programmable Timer A diagr...

8254 Programmable Timer A diagram of Intel's 8254 interval event/timer counter is given in Figure. The 8254 consists of 3 identical counting circuits, per of which has GATE and

Cache components-microprocessor, Cache components The cache sub-system ...

Cache components The cache sub-system may be divided into 3 functional blocks: Tag RAM, SRAM and theCache Controller. In real designs, these blocks can be implemented  by multi

Assembly language assignment, The main objective of the assignment is to ex...

The main objective of the assignment is to explore the knowledge regarding parallel ports of a computer system. You can read and write datato/from the parallel port using IN and OU

Group-assemblers directive-microprocessor, GROUP : Group the Related Segme...

GROUP : Group the Related Segments:- The directive which is used to form logical groups of segments with same purpose or type. This isused to inform the assembler to form a log

Interrupt table-how interrupt table processed-microprocessor, Interrupt Tab...

Interrupt Table Each interrupt level has a booked memory location, called an interrupt vector.  All these vectors (or pointers) are stored in the interrupt table. Table lies at

Hold response sequence-microprocesssor, Hold Response Sequence The HOLD...

Hold Response Sequence The HOLD pin is examined at leading edge of each clock pulse. If it is received active line by the processor before T4 of the earlier cycle/during the T1

Mouse, hey ,, I need to know how to let a symbol moves with mouse ??

hey ,, I need to know how to let a symbol moves with mouse ??

Copy a string backwards, I can get it to copy the string but can''t get it ...

I can get it to copy the string but can''t get it to reverse it.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd