Functionality of hypethread processor, Computer Engineering

Assignment Help:

Hyper-threading works by duplicating those parts of processor which store architectural state but not duplicating main execution resources. This permits a Hyper-threading equipped processor to pretend to be two 'logical' processors to host operating system, allowing operating system to schedule 2 processed or threads concurrently. Where execution resources in a non-Hyper-threading capable processor aren't used by current task and particularly when processor is stalled a Hyper-threading equipped processor can use those execution resources to execute other scheduled task. 

Besides its performance implications, this innovation is transparent to Programs and operating systems. All that is needed to take advantage of Hyper-Threading is symmetric multiprocessing (SMP) support in operating system as logical processors emerge as standard separate processors.

Though it's likely to optimize operating system behaviour on Hyper-threading capable systems like Linux techniques explained in Kernel Traffic. E.g. consider an SMP system with two physical processors which are both Hyper-Threaded (for a total of four logical processors). If operating system's process scheduler is unaware of Hyper-threading it will treat all four processors similarly.

Consequently if just two processes are entitled to run it may decide to schedule those processes on two logical processors which happen to belong to one of the physical processors. So one CPU will be very busy while other CPU will be entirely idle, leading to poor overall performance. This can be avoided by improving scheduler to treat logical processors in a different way from physical processors; in a sense it's a limited form of scheduler changes which are needed for NUMA systems.


Related Discussions:- Functionality of hypethread processor

Vector-scalar instructions- vector processing, Vector-Scalar Instructions :...

Vector-Scalar Instructions : In this type, when the combination of vector and scalar are fetched and saved in vector register. These instructions are denoted with the many function

Determine about the verilog task, Determine about the Verilog Task - Ta...

Determine about the Verilog Task - Tasks are capable of enabling a function as well as enabling other versions of a Task. - Tasks also run with a zero simulation however the

Data hazards in computer architecture, Data hazards -  computer architec...

Data hazards -  computer architecture : A main effect of pipelining is to alter the relative timing of instructions by overlapping their execution. This introduces contro

Manipulate the presentation and attributes interactive list, How can you m...

How can you manipulate the presentation and attributes of interactive lists? ---Scrolling by Interactive Lists. ---Setting the Cursor from within the Program. ---Changing

IEEE802.4 Token Bus Network, en a five station token bus LAN with station a...

en a five station token bus LAN with station addresses of 3000, 500, 100, 70, and 50. Stations with addresses of 5000, 4000, 400, 90, and 60 are waiting to enter the ring. Assume a

What are the languages evolved in the html open standard, What are the lang...

What are the languages evolved in the html open standard Even the companies or developers themselves have been affected with such modifications to the open standards since they

Define protocol, Define Protocol. It is a set of rules that are followe...

Define Protocol. It is a set of rules that are followed by interconnecting computers and terminals to make sure the orderly transfer of information

Find the shortest path, The following is the required interface for the mou...

The following is the required interface for the mouse and cheese problem. Your program is required to read its input from a file named 'maze.txt' In the maze.txt

Explain briefly the function of layers, Explain briefly the function of dif...

Explain briefly the function of different layers which are covered under end to end layer connectivity. Different layer are as follows: 1. Transport Layer:  This is res

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd