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Fixed Arithmetic pipelines
We obtain the example of multiplication of fixed numbers. The Two fixed-point numbers are added by the ALU using shift and add operations. This sequential implementation makes the multiplication a slow process. If we seem at the multiplication process cautiously, then we examine that this is the process of adding the multiple copies of shifted multiplicands as given below:
Now, we can signify the following phases for the pipeline:
These phases have been implemented using CSA tree as shown in Figure:-
Arithmetic pipeline for Multiplication of two 6-digit fixed numbers
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The logic circuit shown in the given figure can be minimised to Ans. The minimised figure of logic diagram is D, the output of the logic circuit is as Y=(X+Y')'+(X'+(X+
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