Find differential equation & state-space representation, Electrical Engineering

Assignment Help:

1. For the following network:

a. Find the differential equation assuming that v(t) is the input and the charge on the capacitor q(t) is the output. Hints: iR1= (iR2 + iL), iR2 = (vL + vC) / R2, iL = iC = dq/dt and page 114.

2450_circuit diagram.png

b. Find the state-space representation. Give your answer in vector-matrix form assuming the following values L = 1 H, C = 1 F and R1 = R2 = 1 Ω.

Represent the following transfer function in state space. Give your answer in vector-matrix form.

555_firm equation.png

 Extra credit: Find the transfer function G(s) = Y(s) / R(s) for the following system represented in state space.

1036_matrix xy.png


Related Discussions:- Find differential equation & state-space representation

Explain numeric processor 8087, Explain numeric processor 8087. Numeric...

Explain numeric processor 8087. Numeric processor 8087 is a coprocessor which has been intended to work under the control of the processor 8086 and offer it additional numeric

Multitasking - single processor many users many tasks , Multitasking -  Si...

Multitasking -  Single Processor Many Users Many  Tasks In multitasking or also  called  time sharing  systems  multi  user  more than  one users are sharing  one processor

Explain the construction of jfet, Q. Explain the construction of JFET? ...

Q. Explain the construction of JFET? The basic construction of the p-channel JFET is shown in figure. The major part of the structure is the p-type material that forms the chan

Forward voltage triggering , Forward Voltage  Triggering If V a is i...

Forward Voltage  Triggering If V a is increased the collector to emitter voltages of both  transistor are  also increased. Hence  the leakage current at J 2 increase. This

Multi-link connection in a network of register, Q. Multi-link connection in...

Q. Multi-link connection in a network of register? For a multi-link connection in a network of register- controlled exchanges, a register in originating exchange receives addre

D flip flop - introduction to microprocessors, D Flip Flop As we have ...

D Flip Flop As we have seen  in the SR flip flop  when the inputs  S= R  are applied the forbidden or indeterminate state occurs.  This state can destabilize the SR file flop.

Multiplexers and flip flops, Decoders and multiplexers are termed, medium s...

Decoders and multiplexers are termed, medium scale integration (MSI) devices; this term implies that the device is complex in construction and usually its operation as well. Below

Complete the timing diagram for counter, Q. When the J and K inputs of a JK...

Q. When the J and K inputs of a JKFF are tied to logic 1, this device is known as a divide-by-2 counter. Complete the timing diagram shown in Figure for this counter.

Explain properties and application of aluminium, Explain properties and app...

Explain properties and application of Aluminium. Properties of Aluminium: 1) Pure aluminium in colour is silver white. 2) Aluminium is a ductile metal and can be put

Digital logical disign, design SR latch with universal logic gates.draw and...

design SR latch with universal logic gates.draw and explain the logic diagrams

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd