Explain use of parallel sections construct, Computer Engineering

Assignment Help:

Q. Explain use of parallel sections construct?

This illustration explains use of parallel sections construct. Three functions, fun1, fun2, and fun3, all can be executed simultaneously. Note that all section directives require appearing in parallel sections construct.

void fun1();

void fun2();

void fun3();

void parallel_sec()

{

#pragma omp parallel sections

{

#pragma omp section

fun1();

#pragma omp section

fun2();

#pragma omp section

fun3();

}

Related Discussions:- Explain use of parallel sections construct

Boolean algebra, Boolean algebra. Boolean algebra mathematical method ...

Boolean algebra. Boolean algebra mathematical method based on human reasoning. In Boolean algebra only two states exist; true and false which are written as 1 (true) and 0 (fa

Hyper-threading, Hyper-threading, officially known as Hyper-threading Techn...

Hyper-threading, officially known as Hyper-threading Technology (HTT), is Intel's trademark for their execution of the simultaneous multithreading technology on the Pentium 4 micro

Predicates in propositional model, Predicates in propositional model: ...

Predicates in propositional model: The predicates take a number of arguments in which for now we assume are ground terms and represent a relationship between those arguments t

Features of hyper-threading, The salient features of hyper threading are: ...

The salient features of hyper threading are: i) Improved support for multi-threaded code, permitting multiple threads to run concurrently. ii) Response time and improved rea

State the datatypes of verilog, State the datatypes of Verilog Verilog....

State the datatypes of Verilog Verilog. Compared to VHDL, Verilog data types are very simple, easy to use and very much geared towards modeling hardware structure as opposed to

Digital Design, Design a serial 2’s complementer with a shift register and ...

Design a serial 2’s complementer with a shift register and a flip-flop

Transition management system, please help me with psudocode for schedule ma...

please help me with psudocode for schedule management which contains stakeholder and application table

Web technology, Write short notes on Event Model.

Write short notes on Event Model.

Number of addresses in an instruction, Generally the Instruction Set Archit...

Generally the Instruction Set Architecture (ISA) of a processor can be distinguished using five categories: Operand Storage in the CPU - Where are the operands kept other t

Interpeter, diifference between pure and impure interpeter

diifference between pure and impure interpeter

Write Your Message!

Name

Email id

Message

Verfication Code

User Account

All Pages