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Using a suitable logic diagram explain the working of a 1-to-16 de multiplexer.Ans. 1-to-16 Demultiplexer Working: A demultiplexer obtains in data from one line and directs this to any of its N outputs depending upon the status of the selected inputs. If the no. of output lines is N (16), no. of select lines m is specified by 2m = N that is, 24 = 16. Therefore, the no. of select lines required for a 1 to 16 demultiplexer is 4. Table illustrates the Truth Table of this Demultiplexer. The input can be send to any of the 16 outputs, D0 to D15. The input goes to D0 if DCBA = 0000. The input goes to D1 if DCBA = 0001 and so on.
Fig.(a) demonstrates the logic diagram of a 1-to-16 demultiplexer, contains 8 NOT gates, 16 NAND gates, one data input line(G), 4 select lines (A,B,C,D) and 16 output lines (that is D0, D1, D2 ------D16). 8 NOT gates stop excessive loading of the driving source. Individual data input line G is implemented along with a NOR gate utilized as negative AND gate. A low level in all input G1 and G2 is needed to make the output G high. The output G of allows is one of the inputs to whole 16 NAND gates. G should be high for the gates to be allowed. If allow or enable gate is not activated so all 16 de-multiplexer outputs will be high not respective of the state of the select lines A, B, C, D.
Demulti-
plexer
Input
Selection
Lines
D C B A
Logic
Function
Demultiplexer Outputs
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
0
0 0 0 0
0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
0 0 0 1
1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2
0 0 1 0
1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1
3
0 0 1 1
1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1
4
0 1 0 0
1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1
5
0 1 0 1
1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1
6
0 1 1 0
1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1
7
0 1 1 1
1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1
8
1 0 0 0
1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1
9
1 0 0 1
1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1
10
1 0 1 0
1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1
11
1 0 1 1
1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1
12
1 1 0 0
1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1
13
1 1 0 1
1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1
14
1 1 1 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1
15
1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
Truth Table of 1-to-16 Demultiplexer
Fig(a): Logic Diagram of 1-to-16 De multiplexer
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