Explain the nand gates - microprocessor, Electrical Engineering

Assignment Help:

Explain the NAND Gates - Microprocessor?

The NAND GATE is a AND gate with the output inverted. Consequently the outputs of a NAND gate would be the opposites of the outputs of a AND gate. The output is true if input A AND input B are NOT both true: Q = NOT (A AND B) A NAND gate able to have two or more inputs, its output is true if NOT all inputs are true.

526_NAND GATES.png

The Boolean and symbol expression for a 3-input NAND gate is shown below.

The NAND gate will have a high output providing all the inputs are not high. Shown underneath is the truth table for a NAND gate. The simplest way to derive the output for a NAND gate is to invert the output of a AND gate.

X INPUT 

Y INPUT

Z INPUT 

OUTPUT

0

0

0

1

0

0

1

1

0

1

0

1

0

1

1

1

1

0

0

1

1

0

1

1

1

1

0

1

1

1

1

0

 


Related Discussions:- Explain the nand gates - microprocessor

Relationship between the induced e.m.f and the network, Mathematical relati...

Mathematical relationship between the induced e.m.f and the network Faraday noted that the e.m.f induced in a loop is proportional to the rate of change of magnetic flux by it:

#title.Shockley diode, I want proof of shockley diode equation with all ste...

I want proof of shockley diode equation with all steps

Program counter , Program Counter (PC) It is a   16 bit  register.  It ...

Program Counter (PC) It is a   16 bit  register.  It is a memory  pointer. It stores  the memory address  of the next  byte of the program to be executed. Memory  address is of

Determine the maximum electric field in the depletion region, An abrupt sil...

An abrupt silicon (n i = 10 10 cm -3 ) p-n junction consists of a p-type region containing 10 16 cm -3 acceptors and an n-type region containing 5 x 10 16 cm -3 donors. a)

Power transistor, Power Transistor A power  transistor  is a three laye...

Power Transistor A power  transistor  is a three layer  PNP  or NPN  semiconductor device  having  two  junctions. Three  terminals of power  transistors are collector emitter

Sketch the output waveform for the synchronous counter, Q. Consider a serie...

Q. Consider a series-carry synchronous counter with T flip-flops shown in Figure in which the AND gates carry forward the transitions of the flip-flops, thereby improving the speed

Representation of negative number, Representation of Negative Number: ...

Representation of Negative Number: As  mentioned  in chapter 1 in 8085  negative  numbers are represented in 2 complement  form  and subtraction is  performed  using 2  comple

Governer, governer characteristics

governer characteristics

Architecture for Real-time systems, The paper should be written in the form...

The paper should be written in the format of a paper to be submitted to a conference (IEEE). There should be a minimum of three journal paper references. The topic should be a disc

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd