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Explain the delay model based on logical effort often used in estimating delays in logic cells. Hence use the model to predict the delay of a 4-input NOR logic cell with a 3 times drive driving a net with a fan out of 3, with a total load capacitance (comprising the input capacitance of the three driven cells plus the interconnect) of 0.15pF. Assume the cell is fabricated using the Compass 0.5 micronmeter technology (C5) with parameters given in Table p133 (Smith).
GIS Based Mapping of Electrical Network: You have learnt in which the Geographic Information System is a system of mapping of the complete electrical network. The question we
Multiplexed Address/ Data Bus Pins AD 7 - AD) are used for multiplexed address data bus. This bus is bidirectional input output and serves two purpose. Initially the bus
Transistor Switching Circuit Design a) Sketchy a schematic diagram showing how a transistor can be used to control the operation of a relay b) Determine what is meant by ba
Q. A 75-kVA, 230/115-V, 60-Hz transformer was tested with these results: • Open-circuit test: 115 V, 16.3 A, 750 W • Short-circuit test: 9.5 V, 326 A, 1200 W Determine:
A very widely used alternative form of synchronous motor is the ' indu c tion motor'. This has the advantage that it does not require an auxiliary motor to run the rotor up t
Consider the operation of a dc shuntmotor that is affected by the following changes in its operating conditions. Explain the corresponding approximate changes in the armature curre
Q. What is Schokleys Equation. Find out a relation between Vgs and Ids? Schokleys Equation is used for defining the relation between the Gate source voltage and the Drain curre
Discuss DMA definition. Direct memory access (DMA) is a process wherein an external device takes over the control of system bus by the CPU. Direct memory access is for high-sp
a) A 230 V/25V, 50 HZ transformer with a rated primary current of 1,2 Amps is used to supply a number of 25 V, 30 Watt halogen light bulbs. Assuming an ideal transformer and that
Explain the Procedure for design of Sequential Circuits? The design of the synchronous sequential circuit starts from a set of specifications and culminates in a logic diagram
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