Explain the basic architecture of digital switching systems, Computer Engineering

Assignment Help:

Explain the basic architecture of digital switching systems.

An easy N X N time division space switch is demonstrated in figure. The switch can be shown in an equivalence form as a two-stage network along with N X 1 and 1 X N switching matrices for the first and second stages correspondingly as demonstrated in figure. The network has one connection interconnecting the two stages. All inlet/outlet is a single speech circuit consequent to a subscriber line. The speech is carried like PAM analogue samples or PCM digital samples, occurring at 125-µ s intervals. When PAM samples are switched in a time division manner, the switching is termed as analogue time division switching. When PCM binary samples switched, then the switching is termed as digital time division switching. In figure, the interconnected by an appropriate control mechanism and the speech sample transferred by the inlet to the outlet.

398_Two – stage Equivalence.png

FIG - Two - stage Equivalence


Related Discussions:- Explain the basic architecture of digital switching systems

Give difference between compiler and interpreter, Give difference between c...

Give difference between compiler and interpreter. Compiler: It is a translator for machine independent HLL as FORTRAN and COBOL etc. Interpreter: It analysis the source

What is dynpro, What is dynpro?What are its components ? A dynpro (Dyna...

What is dynpro?What are its components ? A dynpro (Dynamic Program) having of a screen and its flow logic and controls exactly single dialog steps. The dissimilar components

Explain about the network security, Explain about the network security. ...

Explain about the network security. Network security implies the protection of networks and their services through unauthorized access, destruction or disclosure, modificati

State about sixth generation electronic computers, Sixth Generation (1990 -...

Sixth Generation (1990 - ) This  generation  begun  with  many  gains  in  parallel  computing,  both  in  hardware area and in improved understanding of how to build up algori

Fully parallel associative processor (fpap), Fully Parallel Associative Pro...

Fully Parallel Associative Processor (FPAP):  This processor accepts the bit parallel memory organisation. FPAP has two type of this associative processor named as: Word Org

Propositional model, Propositional model: Hence a propositional model ...

Propositional model: Hence a propositional model was simply an assignments of truth values to propositions. In distinguish, a first-order model is a pair (Δ, Θ) where

Sort, quick sort working

quick sort working

Explain busy waiting semaphores, Explain busy waiting semaphores. Weak,...

Explain busy waiting semaphores. Weak, Busy-wait Semaphores: The simplest method to implement semaphores. Useful while critical sections last for a short time, or we

Explain about two-pass assembler, Q. Explain about Two-pass assembler? ...

Q. Explain about Two-pass assembler? Assemblers usually make two or more passes through a source program in order to resolve forward references in a program. A forward referenc

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd