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Q. explain the architecture of SS7 and compare with seven-layer OSI architecture.
Ans:
A block schematic diagram of CCITT no. 7 signalling system is displayed in figure. Signal messages are passed from central processor of the sending exchange to CCS system. This comprises microprocessor based subsystem. Signalling control subsystems, signalling termination subsystem and error control subsystem. Signalling control subsystem structures the messages in appropriate format and queues them for transmission. When there aren't any messages to send, it produces filler messages to keep the link active. Messages then passed to signaling termination sub system, where complete signal units (SU) are assembled using sequence numbers and check bits generated by error control subsystem. At the receiving terminal, reverse sequence is carried out.
Consider a CS JFET amplifier with the following parameters : R 1 = 350 k; R 2 = 100 k, R SS = 1200 , R D = 900 , R L = 1000 , R S = 2000 , ro = 15 k,gm = 6 × 10 -3 S,
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