Explain space switching, Computer Engineering

Assignment Help:

Explain Space Switching.

Space Switches: Connections can be made in between outgoing and incoming PCM highways by a cross point matrix of the form demonstrated in figure. However, various channels of an incoming PCM frame may require to be switched by various cross points in order to reach various destinations. Therefore, the cross point is a two-input AND gate. One input is linked to the incoming PCM highway and another to a connection store which produce a pulse at the needed instant. A group of cross points gates can be implemented like an integrated circuit, for illustration using a multiplexer chip.

879_Space Switch.png

FIG - Space Switch.

Figure demonstrates a space switch with k incoming and m outgoing PCM highways, all carrying n channels. The connections store for every column of cross points is a memory along with an address location for every time-slot that stores the number of the cross points to be operated in which time slot. This number is written in the address by the controlling processor so as to setup the connection. The numbers are read out cyclically, into synchronism along with the incoming PCM frame. In every time slot, the number stored at the equivalent store address is read out and decoding logic converts it in a pulse or a single lead to function the relevant cross point.

Because a cross point can make a diverse connection in each of the n time-slots, this is corresponding to n cross points in a space division network. The total space switch is therefore equivalent to n separate k x m switches in a space division switching network.


Related Discussions:- Explain space switching

Design a memory buffer of limited size, Extend task 1 so that it now suppor...

Extend task 1 so that it now supports a memory buffer of limited size. Provide the same functionality as task 1 except now make the server work with a limited buffer size. Like

Explain transport layer of osi model, Explain Transport Layer of OSI Mode...

Explain Transport Layer of OSI Model. The transport layer utilizes the services provided through the network layer, as best path selection and logical addressing, to give end

What is branch folding, What is branch folding? The instruction fetch u...

What is branch folding? The instruction fetch unit has implemented the branch instruction concurrently with the implementation of other instructions. This technique is referred

Explain potential of parallelism, Potential of Parallelism Problems in ...

Potential of Parallelism Problems in the actual world differ in respect of the amount of inherent parallelism intrinsic in respective problem domain. Some problems can be easil

Difference between synchronous and asynchronous updates, What is the differ...

What is the difference between Synchronous and Asynchronous updates? A program asks the system to perform a particular task, and then either waits or doesn't wait for the task

Works flowing related technologies influence e-business, How the works do f...

How the works do flowing related technologies influence e-business? Work Flow related Technologies influence e-business: Microsoft CRM automates internal business process

Prototyping and incremental development, a) Write  the main differences amo...

a) Write  the main differences among prototyping and incremental development.    b) Explain the commonality and main differences among agile approach and RUP.

Differences between a uri, Question: (a) Describe the differences betwe...

Question: (a) Describe the differences between a URI, a URN and a URL. (b) What are the five basic syntax rules for a well-formed XML document? (c) Provide four uses of

What is usb, What is USB USB (UNIVERSAL SERIAL BUS) is intended to conn...

What is USB USB (UNIVERSAL SERIAL BUS) is intended to connect peripheral devices like mouse, keyboards, modems and sound cards to microprocessor through a serial data path and

Determine the minimum configuration of the decoder, The following switching...

The following switching functions are to be implemented using a Decoder f 1   = ∑ m(1, 2, 4, 8, 10, 14)   f 2   = ∑ m(2, 5, 9, 11)   f 3   = ∑ m(2, 4, 5, 6, 7) The minimum configur

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd