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Q. Explain Source encoding or data compression?
The sequence of binary digits from the source encoder, known as the information sequence, is passed on to the channel encoder. The purpose of the channel encoder is to introduce some redundancy in a controlled manner in the binary information sequence, so that the redundancy can be used at the receiver to overcome the effects of noise and interference encountered in the transmission of the signal through the channel. Thus, redundancy in the information sequence helps the receiver in decoding the desired information sequence, thereby increasing the reliability of the received data and improving the fidelity of the received signal.
The binary sequence at the output of the channel encoder is passed on to the digitalmodulator, which functions as the interface to the communication channel. The primary purpose of the digital modulator is to map the binary information sequence into signal waveforms, since nearly all the communication channels used in practice are capable of transmitting electric signals (waveforms). Because themessage has only two amplitudes in a binary system, themodulation process is known as keying. In amplitude-shift keying (ASK), a carrier's amplitude is shifted or keyed between two levels. Phase-shift keying (PSK) involves keying between two phase angles of the carrier,whereas frequency-shift keying (FSK) consists of shifting a carrier's frequency between two values.Many other forms of modulation are also possible.
Q. When the J and K inputs of a JKFF are tied to logic 1, this device is known as a divide-by-2 counter. Complete the timing diagram shown in Figure for this counter.
why conductance is not zero at end pont? reply as soon as possible.
Q. How speech is transmitted in digital switching environment by using PCM/TDM? Ans: A digital carrier system is a communications system which uses digital pulses instead of
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The coursework requires you to work in pairs to write a Java application that will take a numerical representation of a MIPS program and simulate its execution. MIPS is a Load-S
Mixed Mode Simulator: The circuit is preprocessed. The test points and waveform markers are located in input and output of the circuit. GND net is set like reference net.
The assignment comprises two parts, a CPLD Design Exercise and a CPLD Design Project. The CPLD Design Exercise will enable you to acquire competance in programmable logic design
Q. A semiconductor diode with IS = 10µA and a 1-k resistor in series is forward-biased with a voltage source to yield a current of 30mA. Find the source voltage if the diode I-V e
Q. Describe the construction of a two stage RC coupled amplifier with diagram. A cascaded arrangement of common-emitter transistor stages is shown above. The output Y1 of
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