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Explain segmentation hardware?
We define an completion to map two-dimensional user-defined addresses into one-dimensional physical addresses. This mapping is affected by means of segment table. Every entry in the segment table has a segment base and a segment limit. The segment base holds the starting address where the segment resides in memory, where the segment limit specifies the length of the segment.
A logical address consists of two parts that are a segment number's, and an offset into that segment d. The segment number is utilized as an index to the table. The offset d of the logical address should be between 0 and the segment limit. The segment table is fundamentally an array of base-limit register pairs.
Many-to-Many Model The many-to-many model- many user-level threads to many kernel-level threads avoids several of the limitations of the one-to-one model, although extending mu
why we say " OS is a resource allocator" and “OS is a control program"?
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What are the two principles in Hungarian method?
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how do you calculate page faults
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