Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain Relative Addressing Scheme?
In this addressing technique the register R is the program counter (PC) which contains the address of current instruction being executed. Operand field A comprises the displacement (negative orpositive) of adata or instruction with respect to current instruction. This addressing scheme has benefits if memory references are nearer to current instruction being executed. (Please refer to the Figure below).
Let's give an illustration of Index, Base and Relative addressing techniques.
Illustration 1: What would be the effective address and operand value for following LOAD instructions?
(i) LOAD IA 56 R1 Where IA signifies index addressing and R1 is index register and 56 is the displacement in Hexadecimal.
(ii) LOAD BA 46 B1 Where BA signifies base addressing and B1 is base register and46 is the displacement specified in instruction in Hexadecimal notation.
(iii) LOAD RA 36 Where RA signifies relative addressing.
The values of memory and registers is given below:
The values are displayed in the below table:
The velocity of sound in air is 49.02 feet per second where is the air temperature in degrees Rankine. Write a function to execute this. If just 1 argument is passed to the f
What is bus arbitration? It is method by which the next device to become the bus master is selected and bus mastership is transferred to it. There are two ways for doing this:
what is asymptotic notation?
its language base assignment
Explain a public key encryption system? A public key encryption system permits only the correct receiver to decode the data.
Explain importance of modems used in data transfer and list some of the V-series recommendations. The series also describes a variety of DCEs using different type modulatio
Super scalar architecture Pentium microprocessor is organized with three execution units. One executes floating-point instructions and other two (U-pipe and V-pipe) execute in
Normal 0 false false false EN-IN X-NONE X-NONE MicrosoftInternetExplorer4
Levels of parallel processing We could have parallel processing at four levels. i) Instruction Level: Most processors have numerous execution units and can execute numero
Q. Explain Simple Interfacing? The following is a sample of the coding, used for procedure interfacing: PUBLIC CUROFF _TEXT SEGMENT WORD PUBLIC 'CODE'
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd