Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain Relative Addressing Scheme?
In this addressing technique the register R is the program counter (PC) which contains the address of current instruction being executed. Operand field A comprises the displacement (negative orpositive) of adata or instruction with respect to current instruction. This addressing scheme has benefits if memory references are nearer to current instruction being executed. (Please refer to the Figure below).
Let's give an illustration of Index, Base and Relative addressing techniques.
Illustration 1: What would be the effective address and operand value for following LOAD instructions?
(i) LOAD IA 56 R1 Where IA signifies index addressing and R1 is index register and 56 is the displacement in Hexadecimal.
(ii) LOAD BA 46 B1 Where BA signifies base addressing and B1 is base register and46 is the displacement specified in instruction in Hexadecimal notation.
(iii) LOAD RA 36 Where RA signifies relative addressing.
The values of memory and registers is given below:
The values are displayed in the below table:
Explain the action of an interrupt processing routine? Action of an interrupt processing routine is as follows : 1. Save contents of registers of CPU. This action is not e
Classification according to pipeline configuration: According to the configuration of a pipeline, the following parts are recognized under this classification: Unifunct
Define throughput? Throughput in CPU scheduling is the number of processes that are completed per unit time. For long processes, this rate might be one process per hour; for s
. weather (windy, rainy or sunny) 2. how much money you have (rich or poor) 3. whether your parents are visiting (yes or no)
Subroutine are the part of implementing processes (like any process can call a subroutine for achieve task), whereas the interrupt subroutine never be the part. Interrupt subroutin
Task A logically discrete sector of a computational effort. A task is naturally a program or program-like set of instructions that is implemented by a processor. Parallel
Design a model for object oriented development The model for object oriented development could be shown as in Figure. It could be classified as dynamic / static and physical /
It is not essential to maintain the Parent-Child relationship among the tables in Logical Database Structure. False. One has to handle the Parent-Child relationship.
A data set with 1000 rows is input to a neural network in Weka. The test option is set to 10-fold cross validation and the neural network option validationSetSize = 20%. How many r
LRU code
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd