Explain potential of parallelism, Computer Engineering

Assignment Help:

Potential of Parallelism

Problems in the actual world differ in respect of the amount of inherent parallelism intrinsic in respective problem domain. Some problems can be easily parallelized. Conversely, there are some inherent chronological problems (e.g. computation of Fibonacci sequence) whose parallelization is almost impossible. The extent of parallelism can be enhanced by suitable design of an algorithm to solve the problem consideration. If processes do not share address space and we could get rid of data dependency among instructions, we can attain higher level of parallelism. The idea of speed up is used as a measure of the speed up which indicates up to what extent to which a sequential program can be parallelized.  Speed up can be taken as a sort of amount of inherent parallelism in a program. In that respect, Amdahl has given a law, called Amdahl's Law, according to this law potential program speedup is stated by the fraction of code (P) which can be parallelised:

Speed up= 1 / 1-p

If no part of the code can be parallelized, P = 0 and speedup = 1 it implies that it is an inherently chronological program. If all the code is parallelized then P = 1, the speedup is infinite. However practically, the code in no program is able to make 100% parallel. Therefore speed up cannot be infinite ever.

If 50% of code can be parallelized, maximum speedup = 2, meaning the code would run twice as fast.  

If we set up the number of processors executing the parallel fraction of work, the relationship can be modeled by:

2485_Potential of Parallelism.png

Where P = parallel fraction, N = total number of processors and S = Serial fraction.The Table 1 shows the values of speed up for various values N and P.

1889_Potential of Parallelism 1.png

The Table 1 proposes that speed up increases as P increases. Though, after a certain limits N doesn't have much impact on the value of speed up. The reason being that is for N processors to remain active, the code must be in some way or other, be divisible in more or less N parts, independent part, every part taking almost equal amount of time.


Related Discussions:- Explain potential of parallelism

The disadvantage of specifying parameter, The disadvantage of specifying pa...

The disadvantage of specifying parameter during instantiation are: -  This has a lower precedence when compared to assigning using defparam.

Differentiate memory mapped and isolated i/o, Q. Explain how does CPU perf...

Q. Explain how does CPU perform Read and Write operation on peripheral device taking suitable example in case of Asynchronous Technique. Differentiate Memory mapped and Isolated

Describe about instruction set, Q. Describe about Instruction set? Inst...

Q. Describe about Instruction set? Instruction set is the boundary where computer designer and computer programmer see the same computer from various viewpoints. From the desig

Illustrate third generation computers, Q. Illustrate third Generation Compu...

Q. Illustrate third Generation Computers? The third generation has fundamental hardware technology: Integrated Circuits (ICs). To understand what are Integrated circuits let's

Biometric systems for implementing client server network, Discuss password ...

Discuss password schemes and Biometric systems for implementing client server network security.          In cyberspace, buyers & sellers cannot see each other. Also in video con

The goal of hashing, The goal of hashing is to produce a search that takes ...

The goal of hashing is to produce a search that takes   O(1) time

Limitations of execution of instructions, Q. Limitations of execution of in...

Q. Limitations of execution of instructions? 1. Size of memory shown in 16 words while instruction is capable of addressing 210 =1 K words of Memory. However why 210 since 10 b

Input-output-processor interconnection network (iopin), Input-Output-Proces...

Input-Output-Processor Interconnection Network (IOPIN) This interconnection network is used for communication between I/O channels and processors. All processors commune with a

Layered architecture.., advantages and disadvantages of layered architectur...

advantages and disadvantages of layered architecture in computer network.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd