Explain naming convention scripts, Computer Engineering

Assignment Help:

Explanation:-

A script within Rational Robot is a file that haves a sequence of SQABasic code. The extension of the file is always ".REC".

Syntax
[FEATURE] + "_" + [FUNCTION] + "_" + {optional}

[FEATURE] is a capital letter string denoting the feature name [FUNCTION] is a capital letter string denoting the function {optional} means that the remaining characters preceded by an underscore will be optional and left to every person to define a sensible name which clearly identifies every of the test scripts

Example · BILL_REP_Outputformat (refers to script Billing feature with report function)
· PART_INS_Assesor
· PART_UPD_Assessor

 


Related Discussions:- Explain naming convention scripts

How do we synthesize verilog into gates with synopsys, How do we synthesize...

How do we synthesize Verilog into gates with Synopsys?  The answer can, of course, occupy various lifetimes to completely answer.. BUT.. a straight-forward Verilog module can b

Programming with loops and comparisons, Q. Programming with loops and compa...

Q. Programming with loops and comparisons? This segment deals with more practical illustrations employing comparison, loops and shift instructions. Simple Program Loops

Find out decimal equivalent of the hexadecimal number, What is the decimal ...

What is the decimal equivalent of the hexadecimal number 'A0' ? Ans. The decimal equivalent value is 160 of the hexadecimal number 'A0'. As   A        0      16 1     16 0    =

Vector processing, Vector Processing  A vector is an ordered set of the...

Vector Processing  A vector is an ordered set of the similar type of scalar data items. The scalar item can be a floating point number, a logical value or an integer. Vector pr

Prior conditions - logic programs, Prior Conditions - Logic programs: ...

Prior Conditions - Logic programs: However firstly there we must make sure that our problem has a solution. Whether one of the negative examples can be proved to be true from

Why a function should have at least one input, Why a function should have a...

Why a function should have at least one input? There is no strong reason for this in verilog. I think this restriction isn't removed fin SystemVerilog. Some requirements where

Explain status and control registers, Q. Explain Status and Control Registe...

Q. Explain Status and Control Registers? For control of numerous operations several registers are used. These registers can't be used in data manipulation though content of som

Find the width of a time division space switch, I n a time division space s...

I n a time division space switch the size of the control memory is N and its Width:  (A) Log 10 M  (B) Log e M  (C) Log N M  (D) Log 2 M Where N are the ou

Write shorts notes on sliding window protocol, Write shorts notes on Slidin...

Write shorts notes on Sliding Window Protocol To acquire high throughput rates, protocols employ a flow control technique termed as sliding window. Both, the sender and receive

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd