Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Multiple Instruction and Single Data stream (MISD): In this type of organization multiple processing elements are ordered under the control of multiple control units. Every control unit is managing one instruction stream and processed by its consequent processing element. However every processing element is processing just a single data stream at a time. Consequently, for managing multiple instruction streams in addition of single data stream, multiple processing elements and multiple control units are organised in this categorization. All processing elements are interacting with the common mutual memory for the organisation of single data stream as displayed in Figure. The simply known illustration of a computer capable of MISD function is the C.mmp made by Carnegie-Mellon University.
This kind of computer organisation is represented as:
Is > 1
Ds = 1
Figure: MISD Organisation
This categorization isn't popular in commercial machines as model of single data streams implementing on multiple processors is hardly ever applied. However for the particular applications, MISD organisation can be extremely helpful. E.g. Real time computers should be fault tolerant where various processors execute the similar data for generating the redundant data. This is also termed as N- version programming. All these redundant data are compared as results that must be same; or else faulty entity is replaced. So MISD machines can be applied to fault tolerant real time computers.
What is replacement algorithm? When the cache is full and a memory word that is not in the cache is referenced, the cache control hardware must decide which block should be del
Target abort -computer architecture: Usually, a target holds DEVSEL# asserted through the final data phase. However, if a target desserts DEVSEL# before disconnecting without
Explain briefly Dead code Elimination of the commonly used code optimization techniques Dead code Elimination: Code which is unreachable or which does not influence the pr
What are the different sections of a report? A report is categorized into many sections: The Report header: In this you place a control which must appear only at the startin
MX is conceptually easy, yet bears the fruit of years of domain experience and research. In a nutshell, JMX describes a standard means for applications to expose management functio
How future climate/environment changes can be predicted - Information over time is fed into a weather/climate model - based on changes in weather patterns, carries out a s
Discuss in detail about the Computers and supercomputers Computers are classified with respect to their size, cost and speed as supercomputers, servers, embedded computers and
Zero address instruction. It is also possible to use instruction where the location s of all operand is explained implicitly. This operand of the use of the method for storing
Efficiency of Vector Processing over Scalar Processing: We know that, a sequential computer processes scalar operands one at a time. Thus, if we have to process a vector of len
Construct a shift register from S-R flip-flops. Explain its working. Ans: S-R Flip-Flop Shift Register: Shift registers can be built through using SR flip-flops. Fig.(a)
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd