Explain multiple instruction and single data stream (misd), Computer Engineering

Assignment Help:

Multiple Instruction and Single Data stream (MISD): In this type of organization multiple processing elements are ordered under the control of multiple control units. Every control unit is managing one instruction stream and processed by its consequent processing element. However every processing element is processing just a single data stream at a time. Consequently, for managing multiple instruction streams in addition of single data stream, multiple processing elements and multiple control units are organised in this categorization. All processing elements are interacting with the common mutual memory for the organisation of single data stream as displayed in Figure. The simply known illustration of a computer capable of MISD function is the C.mmp made by Carnegie-Mellon University. 

 This kind of computer organisation is represented as:

Is > 1

Ds = 1

1385_Multiple Instruction and Single Data stream (MISD).png

Figure:  MISD Organisation

This categorization isn't popular in commercial machines as model of single data streams implementing on multiple processors is hardly ever applied. However for the particular applications, MISD organisation can be extremely helpful. E.g. Real time computers should be fault tolerant where various processors execute the similar data for generating the redundant data. This is also termed as N- version programming. All these redundant data are compared as results that must be same; or else faulty entity is replaced. So MISD machines can be applied to fault tolerant real time computers.


Related Discussions:- Explain multiple instruction and single data stream (misd)

What are batch systems, What are batch systems?  Batch systems are quit...

What are batch systems?  Batch systems are quite appropriate for implementing large jobs that need little interaction. The user can submit jobs and return later for the results

Give brief explanation about the keyboards, Give brief explanation about th...

Give brief explanation about the keyboards Keyboards are generally not offered as the number of options is limited and owners of the system do not want customers keying in info

What is an xml entity, Problem : (a) Show whether or not a standard for...

Problem : (a) Show whether or not a standard format for representing data, such as XML, is needed. (b) Using an appropriate example, describe how data is organized in a dat

What are simm and dimm, What are SIMM and DIMM? SIMM are Single In-Line...

What are SIMM and DIMM? SIMM are Single In-Line Memory Module. DIMM is Dual In-Line Memory Modules. Such modules are an assembly of various memory chips on a separate small boa

Explain the test instruction, Explain the TEST instruction TEST instru...

Explain the TEST instruction TEST instruction performs the AND operation. The difference is that AND instruction changes the destination operand whereas TEST instruction doesn

Crafting an isa - computer architecture, Crafting an ISA: We will l...

Crafting an ISA: We will look at some decisions facing an instruction set architect, and In the design of the MIPS instruction set how those decisions were made. MIPS

Define the refresh rates and frame rate, Q. Define the Refresh Rates and fr...

Q. Define the Refresh Rates and frame rate? A special circuit known as the Video Controller scans video memory one row at a time and reads data value at each address sending th

Perceptron training, Perceptron training: Here the weights are initial...

Perceptron training: Here the weights are initially assigned randomly and training examples are needed one after another to tweak the weights in the network. Means all the exa

Explain the main characteristics of semiconductor memory, Explain the Main ...

Explain the Main characteristics of semiconductor memory Memory, with regard to computers, most commonly signifies to semiconductor devices whose contents can be accessed (whic

Memory-to-memory architecture:, Memory-to-Memory Architecture : The pipe...

Memory-to-Memory Architecture : The pipelines can access vector operands, intermediate and final results directly in the main memory. This needs the higher memory bandwidth. How

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd