Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Multiple Instruction and Single Data stream (MISD): In this type of organization multiple processing elements are ordered under the control of multiple control units. Every control unit is managing one instruction stream and processed by its consequent processing element. However every processing element is processing just a single data stream at a time. Consequently, for managing multiple instruction streams in addition of single data stream, multiple processing elements and multiple control units are organised in this categorization. All processing elements are interacting with the common mutual memory for the organisation of single data stream as displayed in Figure. The simply known illustration of a computer capable of MISD function is the C.mmp made by Carnegie-Mellon University.
This kind of computer organisation is represented as:
Is > 1
Ds = 1
Figure: MISD Organisation
This categorization isn't popular in commercial machines as model of single data streams implementing on multiple processors is hardly ever applied. However for the particular applications, MISD organisation can be extremely helpful. E.g. Real time computers should be fault tolerant where various processors execute the similar data for generating the redundant data. This is also termed as N- version programming. All these redundant data are compared as results that must be same; or else faulty entity is replaced. So MISD machines can be applied to fault tolerant real time computers.
Resolution of externally defined symbols is performed by Ans. By Linker resolution of externally defined symbols is performed.
Representations/Languages Used: Many people are taught "AI" with the opening line: "The three most important things in "AI" are representation, representation and representat
Multiple bus architecture: One solution to the bandwidth restriction of a single bus is to simply add extra buses. Consider the architecture indicated in given figure that con
Q. Explain Register Addressing Mode? Operand can be a 16-bit register: Addressing Mode Description Example AX, BX, CX, DX, SI,
A 6-bit Dual Slope A/D converter uses a reference of -6V and a 1 MHz clock. It uses a fixed count of 40 (101000). Find Maximum Conversion Time. Ans. The time T 1 specifie
Illustrate some notations of object modeling notations A classifier is a mechanism which describes behavioural and structural features. In UML significant classifiers are cla
Why can CRC detect more errors than simple Checksum? There are two purposes a CRC can identify more errors than a simple Checksum. 1. Since an input bit is shifted by all th
How call processing takes place? Fundamental Call Procedure: Fig. demonstrates a simplification diagram exemplifying how two telephone sets (as subscribers) are interconnecte
give sample prepaired software?
how can we design a multiplier by using ASM chart and then design the data controller ?!!
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd