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Explain isolated I/O scheme.
In I/O mapped I/O scheme the addresses allocated to memory locations can also be assigned to I/O devices. Because the same address may be assigned to an I/O device or a memory location, the microprocessor should issue a signal to distinguish when the address on the address bus is for an I/O device or a memory location.
Determine the equivalent inductance: Two coils of inductances 4H and 6H are connected in parallel. If their mutual inductance is 3 H, determine the equivalent inductance of th
Q. A four-pole dc machine with 728 active conductors and 30mWb flux per pole runs at 1800 r/min. (a) If the armature winding is lap wound, find the voltage induced in the armatu
Importance of Voltage Quality - KPI The voltage quality has a growing economic impact on the customer and the network operators. The costs related along with "lack of quality"
i need some explanation on Wien Bridge Oscillator with some example ?
Q. If b and a are the radii of the outer and inner conductors, respectively, of a coaxial cable using a polyethylene dielectric (ε r = 2.26), what ratio b/a is needed for the cabl
A three-phase, 400-V, wye-connected induction motor takes the full-load current at 45 V with the rotor blocked. The full-load slip is 4%. Calculate the tappings k on a three-phase
In use, an appropriate bias voltage is applied between the two bases, with B2 made positive with respect to B1. Because the N-type bar is resistive, a relatively small current will
why is detecting the time of islanding relevant?
Sketch the circuit diagram of a 4- ladder network R-C phase shift oscillator and explain its principle of operation. Also determine the gain of the basic amplifier necessary for th
Apply the rule-of-thumb dc design presented in this section for a silicon npn BJT with β = 70 when the operating Q point is defined by I CQ = 15 mA and I BQ = 0.3 mA, with a dc s
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