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Q. Explain how does CPU perform Read and Write operation on peripheral device taking suitable example in case of Synchronous Technique.
Q. What is Block size of cache memory? Block Size: Block size means unit of data (few memory words) exchanged between main and cache memory. As block size increases from very
Simple instruction formats: RISC uses simple instruction formats. Usually only one or a few instruction formats are used. In these machines instruction length is fixed and alig
There are situations, called hazards that stop the next instruction in the instruction stream from implementing during its designated clock cycle. Hazards decrease the performance
Consider a processor with a 4-stage pipeline. Each time a conditional branch is encountered, the pipeline must be flushed (3 partially completed instructions are lost). Determine
How Race Around Condition can be avoided? Ans: The race around condition can be avoided if 1. Duration of clock pulse being high is small like comparative to the dela
Loosely Coupled Systems These systems don't share global memory since shared memory concept increases the problem of memory conflicts, which consecutively slows down the
Indirect addressing A memory location is given that holds another memory location. This second memory location holds the real data. This mechanism solves problems caused by rea
calculate the time complexity of a=(b/c) operation in stack
Write the truth table for a clocked J-K flip-flop that is triggered by the positive-going edge of the clock signal. Ans. Logic diagram of JK flip flop Truth T
Nyquist''s sampling theorem says "if you have a signal that is perfectly band limited to a bandwidth of f0 then you can collect all the information there is in that signal by sampl
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