Explain high level data link control, Computer Engineering

Assignment Help:

Explain High Level Data Link Control.

HDLC - it is High Level Data Link Control:

Protocol Overall explanation:

Layer 2 of the OSI model is the data link layer. One of the most common layers 2 protocols is the HDLC protocol. The fundamental framing structure of the HDLC protocol is demonstrated below:

HDLC uses zero deletion/insertion process (commonly termed as bit stuffing) to make sure that the bit pattern of the delimiter flag does not arise in the fields among flags. The HDLC frame is synchronous and hence relies on the physical layer to give method of clocking and synchronizing the reception and transmission of frames. The HDLC protocol is defined through ISO for utilization on both point-to-point and multipoint (multidrop) data links. This supports full duplex transparent-mode operation and is at this time extensively used in multipoint and computer both networks.

High Level Data Link Control has three operational modes as:

a) Normal Response Mode (NRM)

b) Asynchronous Response Mode (ARM)

c) Asynchronous Balanced Mode (ABM)


Related Discussions:- Explain high level data link control

Determine any three restrictions that apply to class members, a. Determine ...

a. Determine any three restrictions that apply to class members. b. Is it possible for single class to be a friend of another class? Illustrate this using a suitable C++ program

Organisational inertia - obstacle to information system, Organisational Ine...

Organisational Inertia - Obstacle To Information System This is most easily understood as problems of change and culture. Like any change process technology led change will be

What is central processing unit, What is Central Processing Unit Centra...

What is Central Processing Unit Central Processing Unit (CPU) performs all the arithmetic and logical calculations in a computer. The CPU is said to be the brain of the compute

Define the register addressing mode, Q. Define the Register Addressing mode...

Q. Define the Register Addressing mode? When operands are taken from registers implicitly or explicitly it is known as register addressing. These operands are termed as regis

An example of two stages network have switching elements, For two stages ne...

For two stages network the switching elements for M inlets with r blocks and N outlets with s blocks is given by (A) Ms + Nr                                (B)  Mr + Ns (

Isoquants, what are the types of isoquants

what are the types of isoquants

What is compact disk rom, Q. What is Compact Disk ROM? Both audio CD an...

Q. What is Compact Disk ROM? Both audio CD and CD-ROM (compact disk read-only memory) share similar technology. Main difference is that CD-ROM players are more rugged and have

Modelsim, design a basic computer

design a basic computer

Operating system, define request edge and assignment edge

define request edge and assignment edge

Parallel computing, explain different types of parallel processing mechani...

explain different types of parallel processing mechanism

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd