Explain functions of direct memory access, Computer Engineering

Assignment Help:

Q. Explain functions of direct memory access?

Though CPU intervention in DMA is minimised however it should use path between interfaces that is system bus. So DMA involves an extra interface on system bus. A scheme known as cycle stealing permits DMA interface to transfer one data word at a time, after that it should return control of bus to processor. Processor merely delays its operation for one memory cycle to permit directly memory I/O transfer to 'steal' one memory cycle. When an I/O is requested processor issues a command to DMA interface by transmitting to DMA interface the subsequent information (Figure below): 

  • Which operations (write or read) to be performed using write or read control lines.
  • Address of I/O devices that is to be used communicated on data lines.
  • Starting location on memory where information will be read or written to be communicated on data lines and is stored by DMA interface in its address register.
  • Number of words which are to be read or written is communicated on data lines and is stored in data count register.

927_Explain functions of direct memory access.png

Figure: DMA block diagram


Related Discussions:- Explain functions of direct memory access

By which the speech of side tone is heard, Side tone is the speech heard by...

Side tone is the speech heard by (A)  the receiving subscriber (B)  both the receiving and calling subscriber (C) by on looker (D) by calling subscriber Ans

Face detection, i want the matlab code for the following events 1. face det...

i want the matlab code for the following events 1. face detection 2. video to frame conversion 3.video shot boundary detection

What are two verification points for use with web sites, 1. Use the Web Sit...

1. Use the Web Site Scan verification point to check the content of your Web site with each revision and make sure that changes have not resulted in defects. 2. Use the Web Sit

Time slice, The Linux Process Scheduler uses time slice to prevent a single...

The Linux Process Scheduler uses time slice to prevent a single process from using the CPU for too long. A time slice specifies how long the process can use the CPU. In our simulat

What is sdram, Synchronous dynamic random access memory (SDRAM) is dynamic ...

Synchronous dynamic random access memory (SDRAM) is dynamic random access memory (DRAM) that is initialized with the system bus. Classic DRAM has an asynchronous interface, which m

How many types of size categories and data classes are there, How many type...

How many types of size categories and data classes are there? There are five size categories (0-4) and 11 data classes only three of which are suitable for application tables:

Vector-scalar instructions- vector processing, Vector-Scalar Instructions :...

Vector-Scalar Instructions : In this type, when the combination of vector and scalar are fetched and saved in vector register. These instructions are denoted with the many function

Fundamental issues of concerns for instruction set design, Q. Fundamental i...

Q. Fundamental issues of concerns for instruction set design? A number of fundamental issues of concerns for instruction set design are: Completeness: For an early design

Determine the applications of recursion theorem, Applications of recursion ...

Applications of recursion theorem?  1.  ATM is undecidble.  2.  Fixed point theorem.  3. MINTM is not Turing recognisable

Name some register output control signals, Name some register output contro...

Name some register output control signals. Pc out , MDR out , Z out , Offset out , R1 out , R2 out , R3 out and TEMP out .

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd