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Q. Explain functions of direct memory access?
Though CPU intervention in DMA is minimised however it should use path between interfaces that is system bus. So DMA involves an extra interface on system bus. A scheme known as cycle stealing permits DMA interface to transfer one data word at a time, after that it should return control of bus to processor. Processor merely delays its operation for one memory cycle to permit directly memory I/O transfer to 'steal' one memory cycle. When an I/O is requested processor issues a command to DMA interface by transmitting to DMA interface the subsequent information (Figure below):
Figure: DMA block diagram
c-program for the minimum total number of shelves
Which of following requires refreshing SRAM., DRAM., ROM. or EPROM. ? Ans. DRAM. requires refreshing.
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CODE SEGMENT ; Set DS register MOV AX, DATA ; boiler plate code to set the DS register so that the MOV DS, AX ; program can access the data segment.
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