Explain cpu based exchange, Computer Engineering

Assignment Help:

Explain CPU based exchange.

CPU Based Exchange: All the control equipment is replaced with a single processor that must be quite powerful, in centralized control. This should be able of processing 10 to 100 calls per second, depending upon the load on the system, and performing simultaneously of many other ancillary tasks. A usual control configuration of an ESS by using centralized SPC is demonstrated in figure. A centralized SPC configuration may utilize more than one processor for redundancy reasons. Though, there are a large number of services that can be offered by CPU based exchange, they might be grouped under four wide categories.

1157_Typically CPU Based Exchange.png

FIG - Typically CPU Based Exchange

1. Services related with the calling subscribers and designed to decrease the number of dialing errors and the time spent on dialing.

2. Services related with the called subscriber and designed to raise the call completion rate.

3. Services including more than two parties.

4. Various types of services.

These new services are termed as supplementary services and several of the prominent ones are given below as:

 Category 1:

  • Recorded number calls or no dialing calls
  • Abbreviated dialing
  • Call back while free.

Category 2:

  • Operator answer.
  • Call forwarding

Category 3:

  • Call waiting
  • Calling number record
  • Conference calls.
  • Consultation hold

Category 4:

  • STD barring
  • Automatic alarm
  • Malicious call tracing

Issues commands of a subscriber to an exchange to deactivate or activate a service, record or solicit an acknowledgement or clear data in the subscriber line data area from the exchange. As an illustration, a user may enable or disable STD service on his line by using a command. A command may be or not have data related with this. The number of digits in the data, while present, may vary depending on the command. As an effect, subscriber commands are designed to be of variable length requiring the use of an end-of-command symbol.


Related Discussions:- Explain cpu based exchange

Explain direct memory access, Explain Direct Memory Access. A modest en...

Explain Direct Memory Access. A modest enhances in hardware enables an IO device to transfer a block of information to or from memory without CPU intervention. This task needs

Explain about the e-commerce over extranets, Explain about the e-commerce o...

Explain about the e-commerce over extranets. Extranets are regarding “joining up” the supply chain-suppliers, distributors, resellers and customers are enabling business-to bus

Eight-stage process - conjunctive normal forms, Eight-stage process - Conju...

Eight-stage process - Conjunctive normal forms: Hence we notice the following eight-stage process converts any sentence with CNF as:  1.  Eliminate all arrow connectives by

Define electronic data interchange, Electronic Data Interchange (EDI ) is u...

Electronic Data Interchange (EDI ) is used by companies for transactions that happen on regular basis to a pre-determined format. It is one of the electronic commerce technologies.

What is software interrupt, What is software interrupt?   A software in...

What is software interrupt?   A software interrupt is initiated by implementing an instruction.  Software interrupt is a special call instruction that behaves like an interrupt

Define the do while loop, The do while Loop This is very similar to the...

The do while Loop This is very similar to the while loop except that the test occurs at the end of the loop body. This guarantees that the loop is executed at least once before

What is indexed addressing, What is Indexed addressing The location of ...

What is Indexed addressing The location of data is calculated as sum of an address specified by one of previous methods, and value of an index register. This allows an array of

How to correct the error condition while copying file in dos, Q. How to Cor...

Q. How to Correct the error condition while copying file in DOS? In most case, DOS allows you to correct the error condition and retry the command (by pressing R). If the drive

Performance of caches - computer architecture, Performance of caches: ...

Performance of caches:       Amdahl's Law regarding overall speed up:                  Alternatively, CPU stall can be considered:

Determine the output of T-flipflops in cascade, If  the input to T-flipflop...

If  the input to T-flipflop is 100 Hz signal, the final output of the three T-flipflops in cascade is ? Ans. The  final  output  of  the  three  T-flip-flops in cascade is 12.5 H

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd