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What is cache memory?
It is a small, fast memory that is inserted among large, slower main memory and the processor. It decreases the memory access time
Why data bus is bidirectional and address bus is unidirectional in most microprocessors? The data bus is bidirectional because the data bus has to transfer data among the CPU a
What are the types of Subroutines? Internal Subroutines: The source code of the internal subroutines will be in the similar ABAP/4 program as the calling procedure (intern
a. How to use source files in PHP? Define with examples. b. What are benefits of PHP sessions? How is a PHP session formed? c. What is XML and explain its utility? Design an
How does CPU know that an interrupt has taken place? There needs to be a line or a register or status word in CPU which can be increased on occurrence of interrupt situation.
The fields specified by select-options and parameters statement cannot be grouped together in the selection screen. No, It can be grouped together in the selection screen
Q. Writing down your own Interrupt Service Routines? Here are a few rules which should be kept in mind while writing down your own Interrupt Service Routines: 1. Use Int 21
. weather (windy, rainy or sunny) 2. how much money you have (rich or poor) 3. whether your parents are visiting (yes or no)
Q. Define Colspan and Rowspan? Now let's see how to work with COLSPAN (Column Span) and ROWSPAN (Row Span). If we want cell containing Ajay in Figure to be extended to the next
Handling Interrupts: Precise interrupts (sequential semantics) Complete instructions before the offending instructions o Force trap instruction into IF o
You should now have a reasonably clear understanding of what is meant by interaction design. However, there are several other terms which are often used to refer to particular aspe
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