Explain briefly programmable interval timer 8254, Electrical Engineering

Assignment Help:

Explain with proper diagram all the six modes of operation of programmable interval timer 8254.

Mode 0: The output in mode 0 is initially low, and will stay low for the period of the count if GATE = 1.

Width of low pulse = N×T

Here N is the clock count loaded into counter, and T is the clock period of the CLK input.

If the terminal count is reached, the output will go high and stay in high till a new control word or new count number is loaded in it. In mode 0, if GATE input becomes low at the middle of the count then, the count will stop and the output will be low. Therefore count resumes as the gate becomes high again. It in effect adds to the total time the output is low.

Mode 1: It is also termed as hardware triggerable one-shot. The triggering should be done through the GATE input through sending a 0-to-1 pulse to this. The following two steps should be performed as:

  • Load that count registers.
  • A 0-to-1 pulse should be sent to the GATE input to trigger that counter.

Contrast it with mode 0, wherein the counter produces the output immediately after the counter is loaded as long as GATE = 1.In this mode after sending the 0-to-1 pulse to GATE, OUT turns into low and stays low for a duration of N×T, after that becomes high and stays high till the gate is triggered again.

Mode 2: It is also termed as divide-by-N counter. In mode 2, if GATE = 1, OUT will be high for the N×T clock period and goes low for only one clock pulse, so the count is reloaded automatically, as well as the process continues indefinitely.

Mode 3: In mode 3 if GATE = 1, OUT is a square wave here the high pulse is equal to the low pulse when N is an even number. Then the high part and low part of the pulse have the similar duration and are equal to (N/2)×T (50% duty cycle). When N is an odd number, the high pulse is one clock pulse longer.

Mode 3 is extensively used as a frequency divider and audio-tone generator.

Mode 4: In mode 4 if GATE = 1, the output will go high upon loading the count. This will stay high for the duration of N×T. After this count reaches zero (terminal count), this becomes low for one clock pulse, after that goes high again and stays high till a new count or new command word is loaded. To repeat the strobe, the count should be reloaded again. Mode 4 is same to mode 2, except which the counter is not reloaded automatically. In mode 4, the count starts the moment the count is written in the counter.

Mode 5: It is similar to mode 4 except that the trigger should be done with the GATE input. In mode 5 after the count is loaded, we should send a low-to-high pulse to the gate to start the counter.


Related Discussions:- Explain briefly programmable interval timer 8254

Interpreter- high level language, Interpreter- High level language T...

Interpreter- High level language The interpreter is a program  which  translates the high  level  program  into  objects  program  statement wise . it reads one statement of

Show maximum common-mode input voltage, Q. Show Maximum Common-Mode Input V...

Q. Show Maximum Common-Mode Input Voltage of amplifier? This is the maximum voltage that the two inputs can be raised above ground potential before the op amp becomes nonlinear

Schrodinger’s wave equation, Discuss the degeneracy of energy of energy sta...

Discuss the degeneracy of energy of energy states. Solve the Schrodinger’s equation for a free particle in three dimensional boxes and find Eigen values and Eigen function of free

Define short lines, Define Short Lines? For short power lines (up to 50...

Define Short Lines? For short power lines (up to 50 miles; 80 km),  the effects of the shunt capacitance and leakage resistance are negligible. Hence the line may be represente

What is elementary diode circuits, Q. What is Elementary Diode Circuits? ...

Q. What is Elementary Diode Circuits? Semiconductor diodes are used in a wide variety of applications. Their usage abounds in communication systems (limiters, gates, clippers,

Minimized circuit not -or and gate, 1.  Given S(D1) = !Q1 X + !Q1 Q0 + Q1 !...

1.  Given S(D1) = !Q1 X + !Q1 Q0 + Q1 !Q0 !X                                                        and       S(D0) = !Q1 !Q0 !X + Q0 X + Q1 !Q0 !X       A.  DRAW A MINIMI

Basic operation of p-channel enhancement mosfet, Q. Basic Operation of  P-...

Q. Basic Operation of  P-channel enhancement MOSFET? In the fabrication of a p-channel depletion field-effect transistor, the gate is insulated from the channel. Therefore, the

Types of multiplexing techniques, (a) List three types of Multiplexing tech...

(a) List three types of Multiplexing techniques. (b) Give two advantages of "Multiplexing". (c) Given the total duration for the signal is 8 ns. What is the bit rate for

Marginal tax rate, Stratos Corporation is a privately held tablet semicondu...

Stratos Corporation is a privately held tablet semiconductor technology firm with bright growth prospects.The past 5 years have seen the firm evolve from a pure startup to a profit

Determine the value of sr flip-flop, The inputs to an SRFF are shown in Fig...

The inputs to an SRFF are shown in Figure. Determine the value of Q at times t 1 , t 2 , and t 3 .

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd