Explain bernstein conditions for detection of parallelism, Computer Engineering

Assignment Help:

Bernstein Conditions for Detection of Parallelism

For execution of a number of instructions or a block of instructions in parallel, it must be made certain that instructions are independent of one another. These instructions may be control dependent / resource dependent / data dependent on one another. Here we think about just data dependency among the statements for taking decisions of parallel execution. A.J. Bernstein has elucidated the work of data dependency and derived a number of conditions based on that we can decide the parallelism of processes or instructions.

Bernstein conditions are derived from the subsequent two sets of variables:

i)  The Read set or we can say input set RI which consists of memory locations read by statement of instruction I1.

ii) The Write set or output set WI which consists of memory locations written into by instruction I1.

The sets WI and RI are not disjoint as the similar locations are used for reading and writing by SI.

The following are 'Bernstein Parallelism conditions' that are used to conclude whether statements are parallel or not:

1)  Locations in R1 from which S1 reads and locations W2 on which S2 writes should be mutually exclusive. Which means S1 doesn't read from any memory location on which S2 writes. It can be indicated as

  R1 ∩ W2= ?

2)  In the same way, locations in R2 from that S2 reads and the locations W1 on that S1 writes should be mutually exclusive. Which means S2 doesn't read from any memory location onto that S1 writes. It can be designated as: 

R2 ∩ W1= ?

3)  The memory locations W1 and W2, on that S1 and S2 write must not be read by S1 and S2. Which means R1 and R2 must be independent of W1 and W2.  It can be indicated as:

W1 ∩ W2= ?

To demonstrate the operation of Bernstein's conditions, think about subsequent instructions of sequential program:

I1: x = (a + b) / (a * b)

I2: y = (b + c) * d

I3: z = x2 + (a * e)

Now the read set and write set of I1, I2 and I3 are as follows:

R1 = {a, b}        W1 = {x}

R2 = {b, c, d}    W2 = {y}

R3 = {x, a, e}    W3 = {z}

Now let's find out whether I1 and I2 are parallel or not

            R1 ∩ W2 = ?

            R2 ∩ W1 = ?

            W1 ∩ W2 = ?

Which means I1 and I2 are independent of each other.

Similarly for I1 || I3,

R1 ∩ W3= ?

R3 ∩ W1 ≠ ?

W1 ∩ W3= ?

Therefore I1 and I3 aren't independent of each other.

For I2 || I3,


R2 ∩ W3= ?

            R3 ∩ W2= ?

W3 ∩ W2= ?

Therefore, I2 and I3 are independent of one another. So I1 and I2, I2 and I3 are parallelizable however I1 and I3 are not.


Related Discussions:- Explain bernstein conditions for detection of parallelism

Explain time sharing operating system, Explain Time sharing operating syste...

Explain Time sharing operating system. Time sharing: It is also called as multi tasking, is a logical execution of multiprogramming. Multiple jobs are executed through the C

Can we run dot.net in unix platform, Can we run DOT.NET in UNIX platform? ...

Can we run DOT.NET in UNIX platform? One of the drawbacks of using Visual Studio.NET and the .NET framework to develop applications has been the lack of cross-platform support

What are the steps in a bdc session, What are the steps in a BDC session? ...

What are the steps in a BDC session? The first step in a BDC session is to recognize the screens of the transaction that the program will process.  Next step is to write a pro

Introduction to e-commerce, Have you heard about e-commerce? What place is ...

Have you heard about e-commerce? What place is e-commerce located at? What are e-commerce objectives? When did e-commerce starts? How e-commerce works? Who takes advantages of e-co

Computer, is data bus is bidirectional

is data bus is bidirectional

What is the ccitt standard bandwidth for speech, The CCITT standard bandwid...

The CCITT standard bandwidth for speech is: (A) 20000 Hz                                  (B) 15000 Hz (C) 7000 Hz                                    (D) 3400 Hz Ans:

Explain logical shifts with example, Q. Explain Logical shifts with example...

Q. Explain Logical shifts with example? Logical shifts LOGICAL SHIFT LEFT and LOGICAL SHIFT RIGHT insert zeros to end bit position and other bits of a word are shifted left or

Explain pipelining, Define pipelining Pipelining is an efficient way of...

Define pipelining Pipelining is an efficient way of organizing concurrent activity in a computer system. The processor implements the program by fetching and implementing instr

Staircase, What is the aim of a stair case light is controlled by two switc...

What is the aim of a stair case light is controlled by two switches one at the top of the stairs and another at the bottom of the stair

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd