Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain about RISC ARCHITECTURE?
Let's first list some significant considerations of RISC architecture:
1. RISC functions are kept simple unless there is a very good reason to do otherwise. A new operation which increases execution time of an instruction by 10 per cent can be added only if it decreases size of the code by at least 10 per cent. Even greater reductions might be necessary if the extra modification requires a change in design.
2. Micro-instructions stored in CU cannot be faster than simple instructions because the cache is built from same technology as writable control unit store, a simple instruction can be executed at same speed as that of a micro-instruction.
3. Microcode is not magic. Moving software into microcode doesn't make it better; it only makes it harder to change. Runtime library of RISC has all characteristics of functions in microcode, except that it's easier to change.
4. Simple decoding and pipelined execution are more significant than program size. Pipelined execution gives a peak performance of one instruction each step. The longest step determines the performance rate of pipelined machine so ideally every pipeline step must take same amount of time.
5. Compiler must simplify instructions instead of generate complex instructions. RISC compilers try to eliminate as much work as possible at the time of compile time so that simple instructions can be used. For illustration RISC compilers attempt to keep operands in registers so that simple register-to-register instructions can be used. RISC compilers keep operands which will be reused in registers instead of repeating a memory access or a calculation. They consequently use LOADs and STOREs to access memory so that operands aren't implicitly discarded after being fetched.
What is a parallel port? A parallel port transfers data in the form a number of bits, typically 8 to 16, concurrently to or from the device.
A computer system provides protection using the Bell-LaPadula policy. How would a virus spread if A) the virus were placed on the system at system low (the compartment that all o
What are the layers of data description in R/3? There layesr are there:- The external layer. The ABAP/4 layer. The database layer.
What is sensitivity list? A list of signals which trigger execution of the block when they change value. Sensitivity list indicates that when a change occurs to any one of
Object Orientation and Analysis An Object is anything that exists within the problem domain that can be recognized by data and/or behaviour. An example of an object is a bike.
How many flip flops are required to construct a decade counter ? Ans. 4 FlipFlop's are required because decade counter counts 10 states from 0 to 9 (that is from 0000 to 1001).
Explain advantageand disadvantages of a dynamic document. The chief advantages of a dynamic document lie in its capability to report current information. For illustratio
What is Demand paging? Virtual memory is commonly executed by demand paging. In demand paging, the pager brings only those essential pages into memory instead of swapping in a
Write your text, format text, insert picture through Object window or INSERT -> IMAGE. Insert Menu provides you all features which are available under the Object window. Modify men
Differentiate between linear addressing and matrix addressing modes with examples. Ans: Linear Addressing: Addressing is the procedure of selecting one of the cells in a
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd