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Q. Explain about Integration Levels?
Initially only few gates were integrated consistently on a chip. This initial integration was termed as small-scale integration (SSI). With the advances in microelectronics technologies SSI gave way to Medium Scale Integration where hundreds of gates were constructed on a chip. Later phase was Large Scale Integration (1,000 gates) and extremely large integration (VLSI 1000,000 gates on a single chip). Currently we are in the era of Ultra Large Scale Integration (ULSI) where approximately 100,000,000 or even more components can be fabricated on a single chip.
Add a byte number from one memory location to a byte from subsequent memory location and put sum in the third memory location. Also save carry flag in the least significant bit of
How many address bits are required to represent a 32 K memory ? Ans. 32K = 25 x 210 = 215, Hence 15 address bits are needed; Only 16 bits can address this.
Explain Sequential logic circuit Ans. Sequential logic circuit:- (i) Output not only depends upon the recent state of the input but also depend upon the earlier state
what is computer
You can search an updated README.mailif file in the contrib/ directory of your Bugzilla distribution that walks you by the setup.
Give example of bus and memory transfer For example, the read operation for transfer of a memory unit M from address register AR to another data register DR can be illustrated
Why do we need DMA? DMA is used to transfer the block of data directly among an external device and the main memory without the continuous intervention by the processor.
Th e ID3 algorithm The calculation for information gain is the very difficult phase of this algorithm. ID3 performs a search whereby the search states are decision trees an
For the purposes of this assignment, you are the accountant for an industrial property development company, Devprop Leasing Co., that typically develops warehouse and industrial co
An analog information signal, whose maximum frequency is 6000Hz, is to be transmitted using a PCM system. The quantization error must not exceed the ±1 % of the peak-topeak analog
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