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Q. Explain about Instruction Register and Flags?
The Instruction Register: It comprises the operation code (opcode) and addressing mode bits of the instruction. It assists in determining the numerous cycles to be performed and hence determines related micro-operations that are required to be performed.
Flags: Flags are used by CU for determining the status of CPU and the results of a previous ALU operation. For illustration a zero flag if set conveys to control unit that for instruction ISZ (skip subsequent instruction if zero flag is set) the next instruction has to be skipped.
Q. What is Input - Output commands? There are four kinds of I/O commands which an I/O interface can receive when it's addressed by a processor: Control : This type of c
what is physical data structure in internals of rdbms?
Resource Dependence The parallelism between instructions can also be affected because of the shared resources. If two instructions are occupying the same shared resource then i
Soundness - artificial intelligence: You may see in some application domains-for example automated theorem proving - that your search is "sound and complete". The soundness in
Q. How can we minimize problems occurring because of the branch instructions? We may use various mechanisms which may minimize the effect of branch penalty. To keep mult
Static RAM: No refreshing, 6 to 8 MOS transistors are needed to form one memory cell, Information stored as voltage level in a flip flop. Dynamic RAM: Refreshed periodically, 3
concurrentisation and vectorisation of program
Explain detailed classification of pipelined processor.
Explain briefly, why dynamic RAMs require refreshing? Ans: Due to the charge's natural tendency to distribute itself in a lower energy-state configuration that is, the charg
How non- textual information is contained in a web page? Non-textual information as digitized photo and a graphics image is not inserted directly into a HTML document. In place
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