Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
In this technique, operand field of instruction includes an address and an index register thatcomprises an offset. This addressing scheme is normally used to address the consecutive locations of memory (that may store the elements of an array). Index register is a special CPU register which contains an index value. Contents of the operand field A are taken to be address of the initial or reference location (or first element of array). The index register specifies distance between the starting address and address of that operand.
For illustration: to address of an element B[i] of an array B[1], B[2],....B[n] with every element of array stored in two consecutive locations and starting address of array is presumed to be 101, the operand field A in instruction shall comprises the number 101 and index register R will contain the value of expression (i - 1) × 2.
So for first element of the array index register will hold 0. For addressing 5th element of the array A=101 while index register will hold:
(5- 1) × 2 = 8
So address of 5th element of array B is=101+8=109. In B[5] but the element will be stored in location 109 and 110. To address any other element of array changing the content of index register will serve.
So the effective address in this technique is calculated as:
EA = A +(R)
D = (EA)
(DA is Direct address)
As the index register is employed for iterative applications so the value of index register is decremented or incremented after each reference to it. In numerous systems this operation is performed automatically at the time of the course of an instruction cycle. This feature is termed as auto-indexing. Auto indexing can be auto-decrementing or auto-incrementing. The choice of register to be employed as an index register varies from machine to machine. Some machines use general-purpose registers for this purpose whereas other machines can specify special purpose registers referred to as index registers.
Figure: For Displacement Addressing
Describe the 8251 A programmable communication interface
Design issues: To complete the maximum processor utilization in a multithreaded architecture, the following design issues have to be addressed: Context Switching time: S
W To date we have discussed elementary high level language programming and low level assembler programming, one of the benefits of C is the integration of both , this requires a re
Write the factors considered in designing an I/O subsystem? 1. Data Location: Device selection, address of data within device ( track, sector etc) 2. Data transfer: Amount
Discuss in detail the subscriber loop systems. Subscriber Loop System: Every subscriber in a telephone network is linked usually to the nearest switching office by means of w
dqueue
What are conditions under which a deadlock situation may arise? A deadlock situation can arise if the following four conditions hold concurrently in a system: a. Mutual exc
Question a) In multitasking Operating Systems, there are two kinds of multitasking such as the "Preemptive Multitasking" and the "Cooperative Multitasking". Explain the two me
Q. What do you mean by Perfect Shuffle Permutation? Perfect Shuffle Permutation: It was proposed by Harold Stone (1971). Consider N objects each is represented by n bit number
Q. Explain about integrated circuit? An integrated circuit is created on a thin wafer of silicon that is splitted into a matrix of small areas (size of the order of a few m.m.
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd