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Q. Explain about Combinational Circuits?
Combinational Circuit is one of the models for parallel computers. In interconnection networks, different processors correspond with each other directly and don't need a shared memory in between. Generally combinational circuit (cc) is a associated arrangement of logic gates with a group of m input lines and a group of n output lines as displayed in Figure. The combinational circuits are mostly made up of different interconnected components organised in the form called stages as displayed in Figure below Figure.
Figure: Combinational circuit
Figure: Detailed combinational circuit
It should be noted here there is not any feedback control used in combinational circuits. There are a few terminologies followed in the perspective of combinational circuits like fan in and fan out. Fan in determines total number of input lines connected to every device and fan out determines total number of output lines. In above Figure, the fan is in 3 and fan out is too 3. The subsequent parameters are used for exploring a combinational circuit:
1) Depth: It means that total number of phases used in combinational circuit beginning from input lines to output lines. E.g. in the depth is 4 because there are four various phases connected to an interconnection network. The other variety of interpretation of depth may be that it determines the worst case time complexity of solving a problem as input is given at the primary input lines and data is transmitted between different phases by the interconnection network and at the end reaches the output lines.
2) Width: It determines the total number of devices connected for a specific phase. E.g. in Figure, there are 4 elements connected to the interconnection network which means that the width is 4.
3) Size: It determines the total count of devices used in complete combinational circuit. E.g. in Figure size of combinational circuit is 16 which means that (width * depth).
Q. Limitations of execution of instructions? 1. Size of memory shown in 16 words while instruction is capable of addressing 210 =1 K words of Memory. However why 210 since 10 b
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