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Q. Explain about 4-bit adder-subtractor circuit?
Subtraction operation on binary numbers can be obtained by succession of addition operations only it implies that to achieve subtraction A-B we can find 2's complement of B. This can be computed by 1's complemented and then adding 1 to it. So a common circuit can carry out addition and subtraction operation. A 4-bit adder subtraction circuit is displayed in figure below that is formed by employing XOR gate with each full adder. XOR gate with output 0 is for inspecting overflow.
Figure: 4-bit adder-subtractor circuit
Control input 'x' controls operations it implies that if x =0 then circuit acts as an adder and if x =1 then circuit acts as a subtractor. The operation is summarized as below:
a. When x = 0, c = 0, output of all XOR gates would be same as corresponding input Bi where i = 0 to 3. So Ai and Bi are added by full adders providing Sum Si and carry Ci .
b. When x = 1 output of all XOR gates will be complement of input Bi where i =0 to 3 to that carry C0=1 is added. So circuit finds A plus 2's complement of B which is equal to A-B.
Zero address instruction format is used for (A) RISC architecture. (B) CISC architecture. (C) Von-Neuman architecture. (D) Stack-organized architecture.
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