Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain about 4-bit adder-subtractor circuit?
Subtraction operation on binary numbers can be obtained by succession of addition operations only it implies that to achieve subtraction A-B we can find 2's complement of B. This can be computed by 1's complemented and then adding 1 to it. So a common circuit can carry out addition and subtraction operation. A 4-bit adder subtraction circuit is displayed in figure below that is formed by employing XOR gate with each full adder. XOR gate with output 0 is for inspecting overflow.
Figure: 4-bit adder-subtractor circuit
Control input 'x' controls operations it implies that if x =0 then circuit acts as an adder and if x =1 then circuit acts as a subtractor. The operation is summarized as below:
a. When x = 0, c = 0, output of all XOR gates would be same as corresponding input Bi where i = 0 to 3. So Ai and Bi are added by full adders providing Sum Si and carry Ci .
b. When x = 1 output of all XOR gates will be complement of input Bi where i =0 to 3 to that carry C0=1 is added. So circuit finds A plus 2's complement of B which is equal to A-B.
Database marketing tool or application helps a user or marketing professional in determining the right tool or plan for his valuable add campaign. This tool haves data from all sou
Create a relationship among Employee and Sales tables using Emp No. Enforce referential integrity and select both cascade update and cascade delete options. Save the relationship.
Q. What is Dot Pitch of a CRT? Dot Pitch of a CRT is the distance between phosphor dots of same colour. In Trinitron screens, the term Slot Pitch is used in place of Dot Pitch
what is uml ?
Q. Describe buffer of receiving process? MPI_Gather (Sendaddr, Scount, Sdatatype, Receiveaddr, Rcount, Rdatatype,Rank, Comm): 'Using this function process with rank' rank
Minimize the logic function F(A, B, C, D) = ∑ m(1,3,5,8,9,11,15) + d(2,13) using NAND gate with help of K-map. Ans. Realization of given expression by using NAND gates: In
THE ANALYTICAL ENGINE BY BABBAGE: It was general use computing device that could be used for performing any types of mathematical operation automatically. It contains the follo
2. The Turing test has often been incorrectly interpreted as being a test of whether or not a person could distinguish between responses from a computer and responses from a person
Q. Describe about Frameset? Now make a master page in which you write below code. My Frame Page -- The Master Page
homework help.
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd