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Error Detecting Code - Parity bit:
The general idea for achieving error detection and correction is to add some redundancy (i.e., some extra data) to a message, which receivers can use to check consistency of the delivered message, and to recover data determined to be erroneous. An error-detection scheme may be combined with a system for retransmissions of erroneous data
A parity bit is a bit that is added to a group of source bits to ensure that the number of set bits (i.e., bits with value 1) in the outcome is even or odd. It is a very simple scheme that can be used to detect single error in the output.
Fig. Transmit data using a parity bit
1. A low voltage digital device has a low state of 0 V and a high state of 1.8 V. It generates a signal train of high pulses at a rate of 1 MHz, these pulses having a 10 ns width a
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advantage og stored program control automation
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Ethernet Frame Fields Preamble - seven bytes of alternating 0s also 1s to notify receiver of incoming frame and to provide synchronization SFD (Start frame delimiter)
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