Emitter bias, Electrical Engineering

Assignment Help:

Emitter bias:

596_Emitter bias.png

Figure: Emitter bias

While a split supply (dual power supply) is accessible, this biasing circuit is the very much effective, and gives zero bias voltage at the emitter or collector for load. The negative supply VEE is employed to forward-bias the emitter junction by RE. The positive supply VCC is employed to reverse-bias the collector junction. Just only two resistors are essential for the common collector stage and 4 resistors for the common emitter or common base stage.

We know that,

VB - VE = Vbe

If RB is sufficiently small, base voltage will be almost zero. Hence emitter current is,

IE = (VEE - Vbe)/RE

The operating point is independent of β if RE >> RB

Merit:

Good stability of operating point identical to voltage divider bias.

Demerit:

This type can just only be used while a split (dual) power supply is available.


Related Discussions:- Emitter bias

Cro, Diagram and explanation of cro

Diagram and explanation of cro

Marginal tax rate, Stratos Corporation is a privately held tablet semicondu...

Stratos Corporation is a privately held tablet semiconductor technology firm with bright growth prospects.The past 5 years have seen the firm evolve from a pure startup to a profit

Determine the bits required for a d/a converter, Q. Determine the bits requ...

Q. Determine the bits required for a D/A converter to detect 1-V change when V ref = 15 V.

Sketch the phasor diagram of the voltage, Q. The line-to-line voltage of a ...

Q. The line-to-line voltage of a balanced wye connected three-phase source is given as 100 V. Choose V AB as the reference. (a) For the phase sequence A-B-C, sketch the phasor

Instrument, Differentiate between dual beam and dual trace oscilloscope

Differentiate between dual beam and dual trace oscilloscope

#speed control, explain speed control of dc motor

explain speed control of dc motor

CMA instruction of 8051., if contents of accumulator are all one''s then re...

if contents of accumulator are all one''s then result would be zero so Z flag should be affected and same if all zero''s.....but here it is written that no flags is affected...

Triggering capabilities of logic analyser, trigger capabilities of logic an...

trigger capabilities of logic analyser that differentiate it from other devices???

Which are the different fet amplifiers, Q. Which are the different FET ampl...

Q. Which are the different FET amplifiers? A FET can be used as a small-signal amplifier by connecting one of its lead to signal ground. The other two leads then serve as the i

Complete the timing diagram for counter, Q. When the J and K inputs of a JK...

Q. When the J and K inputs of a JKFF are tied to logic 1, this device is known as a divide-by-2 counter. Complete the timing diagram shown in Figure for this counter.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd