Eliminating data hazards - computer architecture, Computer Engineering

Assignment Help:

Eliminating data hazards:

Forwarding

NOTE: In the following instance, computed values are in bold, whereas Register numbers are not.

Forwarding involves adding output data into a previous stage of the pipeline. For example, let's assume we desire to write the value 3 to register 1, (which already contains a six), and then add 7 to register 1 and hold the result in register 2, for instance

Instruction 0: Register 1 = 6

Instruction 1: Register 1 = 3

Instruction 2: Register 2 = Register 1 + 7 = 10

Following execution, register 2 would contain the value 10. Though, if Instruction 1 (write 3 to register 1) does not fully exit the pipeline before Instruction 2 begins execution, it means that Register 1 does not contain the value 3 when Instruction 2 performs its addition operation. In such type of event, Instruction 2 adds 7 to the old value of register 1 (6), and so register 2 would contain 13 instead for example Instruction 0: Register 1 = 6

Instruction 1: Register 1 = 3

Instruction 2: Register 2 = Register 1 + 7 = 13

This error takes place because before Instruction 1 has committed/stored Instruction 2 reads1 Register the result of its write operation to Register 1. Thus when Instruction 2 is reading the contents of Register 1, register 1 still contains 6, not 3.

Forwarding (described below) helps right such errors by depending on the fact that the output of Instruction 1 (which is 3) may be utilized by subsequent instructions before the value 3 is committed to/stored in Register 1.

Forwarding is implemented by putting back the output of an instruction into the previous stage(s) of the pipeline as soon as the output of that instruction is available.  Forwarding applied to our instance means that we do not wait to commit/store the output of Instruction 1 in Register 1 (in this instance, the output is 3) before making that output accessible to the subsequent instruction (in this particular case, Instruction 2). The effect is that Instruction 2 uses the right (the more recent) value of Register

1: the commit/store was made instantly and not pipelined.

With forwarding enabled, the ID/EX[clarification needed] stage of the pipeline now has 2 inputs: the value read from the register mention (in this instance, the value 6 from Register 1), and the new value of Register 1 (in this instance, this value is 3) which is sent from the next stage (EX/MEM)[clarification needed]. Additional control logic is utilized to determine which input to use.

813_Eliminating data hazards.png


Related Discussions:- Eliminating data hazards - computer architecture

Illustrate about packet switching, Q. Illustrate about Packet switching? ...

Q. Illustrate about Packet switching? Packet switching is used to avoid long delays in transmitting data over the network. Packet switching is a technique that limits the amoun

Address - operand data types, Q. Address - operand data types? A...

Q. Address - operand data types? Addresses : Operands residing in memory are specified by their memory address while operands residing in registers are specified by a re

What is object repository, Object Repository means not a set of objects. ...

Object Repository means not a set of objects. It's a common repository for all the people (Testing, Developers) for seeing all the data in one Login. For example QA needs

Software aspects - computer technology , Software Aspects: Software is...

Software Aspects: Software is a generic term covering the concepts, procedures and instructions which enable computer systems to do useful things. Usually, software is conceiv

Detrmine pure paging, Which is not a key piece of information, stored in si...

Which is not a key piece of information, stored in single page table entry, assuming pure paging and virtual memory Ans. A reference for the disk block which stores the page is

Define hit ratio, Define Hit ratio. The performance of cache memory is ...

Define Hit ratio. The performance of cache memory is frequently measured in terms of quantity called hit ratio. Hit-Find a word in cache. Miss-Word is not found in cache.

Health care professional, Overall, Mr. X is an intelligent and high-functio...

Overall, Mr. X is an intelligent and high-functioning man with good psychological, social, and occupational functioning. The test battery did not reveal any difficulties that warra

Describe critical directive in fortan, Q. Describe Critical Directive in FO...

Q. Describe Critical Directive in FORTAN? The critical directive permits one thread executes associated structured block. When one or more threads attain critical directive the

Explain the significance ipv6 over ipv4, Explain the significance IPV6 over...

Explain the significance IPV6 over IPV4. The maximum size of an Ipv6 datagram is 65575 bytes, with the 0 bytes Ipv6 header. Ipv6 also describe a minimum reassembly buffer size:

Explain hybrid network in standard telephone hand set, Explain Hybrid Netwo...

Explain Hybrid Network in Standard Telephone hand set. Hybrid network: The hybrid network (sometimes termed as a duplex coil or hybrid coil) in a telephone set is a particula

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd