The disadvantages of specifying parameter assignments using defparam are:

-  Parameter  is  essentially specified  by  the  scope  of  hierarchies  underneath  which  it exists. If a particular module gets ungrouped in its hierarchy, [sometimes necessary during synthesis], then scope to specify the parameter is lost and is unspecified.

-  For instance, if a module is instantiated in a simulation testbench and its internal parameters are  then  overridden  using  hierarchical  defparam  constructs  (For  instance,  defparam U1.U_fifo.width = 32;). Afterwards, when this module is synthesized, internal hierarchy within U1  may  no  longer  exist  in  gate-level  netlist,  relying upon  synthesis  strategy chosen. Hence post-synthesis simulation would fail on the hierarchical defparam override.